Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353) Pub Date : 2000-05-28 DOI:10.1109/ISCAS.2000.857438

Jye-Jong Leu, A. Wu

引用次数: 11

Abstract

In this paper, a design methodology for the design of a Montgomery module is proposed. We summarize the result in pseudo C-like codes and call it Booth-encoded Montgomery modular multiplication algorithm. Using this algorithm, iteration number is reduced to about n/2 in each Montgomery operation. In addition, we apply the folding and unfolding techniques to shorten the critical path. Finally, we propose the 4 bit-digit-serial pipelined architecture to process RSA encryption/decryption in a more efficient way. The speed of the proposed algorithm is approximately 1.7 times that of most RSA VLSI designs based on original Montgomery modular multiplication algorithm.

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RSA密码系统中booth编码Montgomery模块的设计方法

本文提出了一种蒙哥马利模块的设计方法。我们将结果总结为伪类c代码，并将其称为booth编码Montgomery模乘法算法。使用该算法，每次Montgomery操作的迭代次数减少到n/2左右。此外，我们还应用了折叠和展开技术来缩短关键路径。最后，我们提出了4位数字串行流水线架构，以更有效的方式处理RSA加解密。该算法的运算速度大约是大多数基于Montgomery模乘法算法的RSA VLSI设计的1.7倍。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)

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