Anders Nejdel, Xiaodong Liu, Mattias Palm, Lars Sundström, Markus Törmänen, H. Sjöland, P. Andreani
{"title":"A 0.6–3.0GHz 65nm CMOS radio receiver with ΔΣ-based A/D-converting channel-select filters","authors":"Anders Nejdel, Xiaodong Liu, Mattias Palm, Lars Sundström, Markus Törmänen, H. Sjöland, P. Andreani","doi":"10.1109/ESSCIRC.2015.7313886","DOIUrl":null,"url":null,"abstract":"We present a wideband quadrature radio receiver employing ΔΣ-based A/D-converting channel-select filters (AD-CSFs). The output of the quadrature passive mixer is directly connected to the input of the ADCSFs, which incorporate the functionalities of both channel selection and data conversion in a single power-optimized block. The 65nm CMOS receiver has a frequency range of 0.6-3.0 GHz and can be programmed to support the 2xLTE20, LTE20, and LTE10 bandwidths. The receiver noise figure varies from 2.4 to 3.5 dB. In 2xLTE20 mode, the current consumption is between 33mA at 0.6 GHz and 44mA at 3.0 GHz, including 10-21mA for LO generation and distribution, supplied from 1.2 V. The SNDR is 47-51dB at an LO frequency of 1.8 GHz.","PeriodicalId":11845,"journal":{"name":"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)","volume":"50 1","pages":"299-302"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2015.7313886","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
We present a wideband quadrature radio receiver employing ΔΣ-based A/D-converting channel-select filters (AD-CSFs). The output of the quadrature passive mixer is directly connected to the input of the ADCSFs, which incorporate the functionalities of both channel selection and data conversion in a single power-optimized block. The 65nm CMOS receiver has a frequency range of 0.6-3.0 GHz and can be programmed to support the 2xLTE20, LTE20, and LTE10 bandwidths. The receiver noise figure varies from 2.4 to 3.5 dB. In 2xLTE20 mode, the current consumption is between 33mA at 0.6 GHz and 44mA at 3.0 GHz, including 10-21mA for LO generation and distribution, supplied from 1.2 V. The SNDR is 47-51dB at an LO frequency of 1.8 GHz.