BTI and charge trapping in germanium p- and n-MOSFETs with CVD HfO/sub 2/ gate dielectric

Abstract

High performance Ge p- and n-MOSFETs with CVD HfO2 gate dielectric were fabricated. Charge trapping and Vth instability were investigated systematically for the first time for Ge MOSFET with different surface treatments (silicon passivation and surface nitridation) and compared to the Si devices. Our results show that: (1) Ge devices with silicon passivation yield better electrical performance and reliability than those with surface nitridation; (2) Ge transistors with silicon passivation exhibit less NBTI degradation than the silicon counterparts; probably due to the larger hole barrier in Ge/dielectric than in Si/dielectric; and (3) PBTI degradation of the Ge transistors is more severe than the silicon devices, which imposes an important reliability issue for Ge CMOS applications