An 18 µW spur canceled clock generator for recovering receiver sensitivity in wireless SoCs

Abstract

A novel spur canceled clock generator (SCCG) capable of recovering RX sensitivity degradations caused by digital clocks in wireless SoCs is presented. Clock spurs which degrade RX sensitivity are canceled by applying the SCCG to the digital circuits or ADCs. The SCCG is integrated into a Bluetooth® smart SoC fabricated in a 65 nm CMOS process. Measured clock spur reduction of over 35 dB and RX sensitivity recovery of 4 dB are achieved. The power consumption and occupied area of the SCCG are only 18 μW and 40 μm × 120 μm, respectively.