1.25 volt, low cost, embedded flash memory for low density applications

R. McPartland, R. Singh
{"title":"1.25 volt, low cost, embedded flash memory for low density applications","authors":"R. McPartland, R. Singh","doi":"10.1109/VLSIC.2000.852878","DOIUrl":null,"url":null,"abstract":"A low cost, embedded flash memory cell, with read control-gate voltage as low as 1.25 volts, has been developed. Single cell testers and 4 kbit arrays have been fabricated and characterized. Fabrication requires only a single masking step (thick gate oxide) above that used in high-performance core CMOS logic technologies. Applications include low-density non-volatile memory, control of redundancy in SRAM and DRAM memories, ID or security code registers, and other switch functions.","PeriodicalId":6361,"journal":{"name":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","volume":"319 1","pages":"158-161"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2000.852878","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 28

Abstract

A low cost, embedded flash memory cell, with read control-gate voltage as low as 1.25 volts, has been developed. Single cell testers and 4 kbit arrays have been fabricated and characterized. Fabrication requires only a single masking step (thick gate oxide) above that used in high-performance core CMOS logic technologies. Applications include low-density non-volatile memory, control of redundancy in SRAM and DRAM memories, ID or security code registers, and other switch functions.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
1.25伏,低成本,嵌入式闪存低密度应用
一种低成本的嵌入式闪存单元,其读取控制栅电压低至1.25伏。制作并表征了单电池测试仪和4kbit阵列。制造只需要在高性能核心CMOS逻辑技术中使用的单个掩蔽步骤(厚栅氧化物)。应用包括低密度非易失性存储器、SRAM和DRAM存储器中的冗余控制、ID或安全代码寄存器以及其他开关功能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A translinear-based chip for linear LINC transmitters A 200 MHz, 3 mW, 16-tap mixed-signal FIR filter Sub 1-V 5-GHz-band up- and down-conversion mixer cores in 0.35-/spl mu/m CMOS A skew and jitter suppressed DLL architecture for high frequency DDR SDRAMs A wide-band direct conversion receiver with on-chip A/D converters
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1