Comparative delay, noise and energy of high-performance domino adders with stack node preconditioning (SNP)

Yibin Ye, J. Tschanz, S. Narendra, S. Borkar, M. Stan, V. De
{"title":"Comparative delay, noise and energy of high-performance domino adders with stack node preconditioning (SNP)","authors":"Yibin Ye, J. Tschanz, S. Narendra, S. Borkar, M. Stan, V. De","doi":"10.1109/VLSIC.2000.852886","DOIUrl":null,"url":null,"abstract":"Stack node preconditioning (SNP) and \"mutex\" techniques for charge-sharing noise reduction are incorporated into the critical path gates containing transistor stacks in 32-bit domino adders to simultaneously improve best achievable performance by 10% and reduce charge-sharing noise by 2/spl times/ in circuits containing transistor stacks.","PeriodicalId":6361,"journal":{"name":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","volume":"22 1","pages":"188-191"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2000.852886","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

Abstract

Stack node preconditioning (SNP) and "mutex" techniques for charge-sharing noise reduction are incorporated into the critical path gates containing transistor stacks in 32-bit domino adders to simultaneously improve best achievable performance by 10% and reduce charge-sharing noise by 2/spl times/ in circuits containing transistor stacks.
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基于堆栈节点预处理(SNP)的高性能domino加法器的延迟、噪声和能量比较
将堆栈节点预处理(SNP)和用于电荷共享降噪的“互斥”技术整合到32位骨domino加法器中包含晶体管堆栈的关键路径门中,同时将可实现的最佳性能提高10%,并将包含晶体管堆栈的电路中的电荷共享噪声降低2/spl倍。
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