J. Slaughter, R. Dave, M. Durlam, G. Kerszykowski, Ken Smith, K. Nagel, B. Feil, J. Calder, M. Deherrera, B. Garni, S. Tehrani
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引用次数: 29
Abstract
We report here the first integration of a new generation of high magnetoresistance-ratio (MR) magnetic tunnel junction (MTJ) material with a 90 nm CMOS front-end logic process. This new material, with MgO tunnel barriers, significantly increased the read signal over standard AlOx-based material. The 90 nm CMOS test vehicle has 8 kb arrays of 1T1MTJ memory cells with two orthogonal program lines oriented at 45deg from the bit easy axis for toggle switching. Read and toggle-write operations are demonstrated
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