{"title":"Improvement of Breakdown Voltage in SOI MOSFET Using Gate-Recess (GR) Structure","authors":"J. Choi, Y. Park, H. Min","doi":"10.7567/SSDM.1995.S-III-4","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":22504,"journal":{"name":"The Japan Society of Applied Physics","volume":"25 1","pages":"551-553"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The Japan Society of Applied Physics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.7567/SSDM.1995.S-III-4","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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