Performance evaluation of 50 nm In/sub 0.7/Ga/sub 0.3/As HEMTs for beyond-CMOS logic applications

Abstract

We have studied the suitability of nanometer-scale In_0.7Ga_0.3As HEMTs as a high-speed, low-power logic technology for beyond-CMOS applications. To this end, we have fabricated 50-150 nm gate length In_0.7Ga_0.3As HEMTs with different gate stack designs. The 50 nm HEMTs exhibit I_ON/I_OFF ratios in excess of 10⁵ and DIBL less than 90 mV/dec. Compared with state-of-the-art Si MOSFETs, the non-optimized 50 nm In_0.7Ga_0.3As HEMTs provide equivalent highspeed performance with 15 times lower DC power dissipation and at least 2.7 times higher f_T at equivalent power dissipation level. In the landscape of alternatives for beyond CMOS technologies, InAs-rich InGaAs HEMTs hold considerable promise