{"title":"A CMOS laser driver with independently adjustable DC and modulation currents for data rates up to 2.5 Gb/s","authors":"N. Haralabidis, G. Halkias","doi":"10.1109/ISCAS.2000.857462","DOIUrl":null,"url":null,"abstract":"A CMOS laser diode driver (LDD) has been designed and tested, which offers the capability of independent DC and modulation current adjustments. The DC component used to pre-bias the laser diode is adjustable at a range of 0-40 mA. The modulation current can also be adjusted within a range of 0-30 mA. According to experimental results it can efficiently accommodate data rates up to 2.5 Gb/s while maintaining the full range of DC pre-bias component. Special issues regarding performance degradation have been addressed during circuit design which led to at least 25% performance enhancement compared to a conventional solution. The circuit has been fabricated in AMS 0.8 /spl mu/m CMOS process.","PeriodicalId":6422,"journal":{"name":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","volume":"7 1","pages":"425-428 vol.5"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2000.857462","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
A CMOS laser diode driver (LDD) has been designed and tested, which offers the capability of independent DC and modulation current adjustments. The DC component used to pre-bias the laser diode is adjustable at a range of 0-40 mA. The modulation current can also be adjusted within a range of 0-30 mA. According to experimental results it can efficiently accommodate data rates up to 2.5 Gb/s while maintaining the full range of DC pre-bias component. Special issues regarding performance degradation have been addressed during circuit design which led to at least 25% performance enhancement compared to a conventional solution. The circuit has been fabricated in AMS 0.8 /spl mu/m CMOS process.