High Linearity Vector Matrix Multiplier using Bootstrapping and Pre-Emphasis Charging of Non-linear Charge-Trap Synaptic Devices

Abstract

In this paper, we propose a neuromorphic Vector Matrix Multiplier (VMM) with high linearity based on charge-trap (CT) synaptic device. From the analysis on the non-linearity of drain current in CT-based VMM cell with respect to drain voltage and the amount of charges stored in the floating gate (FG), a coupling capacitor, Cgdx, is added between the gate and drain nodes to mitigate the non-linearity induced by drain voltage. The WL and DL drivers are kept floating during the read operation for effective coupling. As a result, the linear drain voltage range has been extended from 0.2V to 0.9V when evaluated with signal-to-noise ratio (SNR) or effective number of bits (ENOB). Pre-emphasis amount of charges is injected to FG to compensate non-linearity of drain current dependence of threshold voltage. The linearity on a 128x128 VMM array has improved by above 3.56 ENOB in average over 0.9V swing of drain voltage and 2.0V swing of threshold voltage.