A floating-gate pFET based CMOS programmable analog memory cell array

Abstract

The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than by the die area. Currently, many analog parameters and biases are stored off chip. Moving parameter storage on chip could save pins and allow us to create complex programmable analog systems. In this paper, we present a design for an on-chip non-volatile analog memory cell that can be configured in addressable arrays and programmed easily. We use floating-gate MOS transistors to store charge, and we use the processes of tunneling and pFET hot-electron injection to program values. With these designs, we achieve greater than 13-bit output precision with a 39 dB power supply rejection ratio and no crosstalk between memory cells.