V. S. Bhaskar, Jong Ming Chinq, Kazunori Yamamoto, G. Tang
{"title":"用于逆变器的碳化硅功率模块的电气设计与建模","authors":"V. S. Bhaskar, Jong Ming Chinq, Kazunori Yamamoto, G. Tang","doi":"10.1109/ectc51906.2022.00320","DOIUrl":null,"url":null,"abstract":"In this paper, electrical design and modeling of silicon carbide power modules for inverter applications are discussed. A 6-in-l silicon carbide MOSFET power module is proposed, and its package is described and analyzed. The electrical design and modeling are done using Ansys Q3D simulation to extract the parasitic inductances and capacitances. The computed power loop inductance is 6.21 nH, gate loop inductance is 1.94 nH, while the parasitic capacitance is 29.98 pF.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Electrical Design and Modeling of Silicon Carbide Power Modules for Inverter Applications\",\"authors\":\"V. S. Bhaskar, Jong Ming Chinq, Kazunori Yamamoto, G. Tang\",\"doi\":\"10.1109/ectc51906.2022.00320\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, electrical design and modeling of silicon carbide power modules for inverter applications are discussed. A 6-in-l silicon carbide MOSFET power module is proposed, and its package is described and analyzed. The electrical design and modeling are done using Ansys Q3D simulation to extract the parasitic inductances and capacitances. The computed power loop inductance is 6.21 nH, gate loop inductance is 1.94 nH, while the parasitic capacitance is 29.98 pF.\",\"PeriodicalId\":139520,\"journal\":{\"name\":\"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ectc51906.2022.00320\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ectc51906.2022.00320","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Electrical Design and Modeling of Silicon Carbide Power Modules for Inverter Applications
In this paper, electrical design and modeling of silicon carbide power modules for inverter applications are discussed. A 6-in-l silicon carbide MOSFET power module is proposed, and its package is described and analyzed. The electrical design and modeling are done using Ansys Q3D simulation to extract the parasitic inductances and capacitances. The computed power loop inductance is 6.21 nH, gate loop inductance is 1.94 nH, while the parasitic capacitance is 29.98 pF.
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