无铅倒装芯片封装的碰撞裂纹和变形研究

Jeremias P. Libres, J. C. Arroyo
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引用次数: 7

摘要

在下一代倒装芯片封装中,对无铅封装互连的需求需要满足封装可靠性要求的通量和下填充解决方案。在初始封装开发过程中,对大型全无铅陶瓷倒装芯片BGA封装进行温度循环,观察到凹凸裂纹和凹凸变形。这种现象在其性质和失效机制方面被认为是独特的。传统的凹凸裂纹问题主要集中在硅和下填料界面附近。在这种情况下,裂纹发生在远离硅或衬底界面的大块焊料内。失败的凸起也显示出严重的变形。此外,受影响凸起周围的下填料的形态差异为破坏机制的性质提供了重要线索。为了了解大块焊料中独特的凹凸裂纹问题的根本原因,包括工艺和材料相关因素,我们进行了广泛的调查,从而清楚地了解了失效机制,并实施了有效的解决方案。本文描述了残渣与下填料相互作用的关系,残渣对下填料性能的局部变化,以及这种变化对包体受力过程中凸块完整性的最终影响。这些发现使得建立一个良好的通量下填充选择方法成为可能,以实现健壮的无铅封装解决方案,该解决方案正在下一代倒装芯片产品中实施。
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Investigation of bump crack and deformation on Pb-free flip chip packages
The demand for die to package interconnects free of Pb in the next generation flip chip packages requires a flux and underfill solution that meets package reliability requirements. Bump cracks and bump deformation were observed during temperature cycling on large body, full Pb-free ceramic flip chip BGA packages during initial package development. The phenomenon is considered unique in terms of its nature and failure mechanism. Traditional bump crack issues are concentrated at or near the silicon and underfill interfaces. In this case, cracks occurred within the bulk solder away from either silicon or substrate interface. Failed bumps also showed severe deformation. In addition, morphology differences in the underfill material surrounding the affected bumps provided important clues as to the nature of the failure mechanism. An extensive investigation to understand the root cause of the unique bump crack issue in the bulk solder, which covered both process and material-related factors, resulted in a clear understanding of the failure mechanism and the implementation of an effective solution to the problem. This manuscript describes the relationship of the flux residue-underfill interaction, the localized change in underfill properties due to the flux residues, and eventually the impact of this change on the bump integrity during package stressing. These findings made it possible to establish a good flux-underfill selection methodology to achieve a robust Pb-free package solution that is being implemented in next generation flip chip products.
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