{"title":"用初始电路减少高级合成中的搜索空间","authors":"A. Masuda, Hiroshi Imai, J.P. Hansen, M. Sekine","doi":"10.1109/ASPDAC.1995.486358","DOIUrl":null,"url":null,"abstract":"Most existing high-level synthesis (HLS) systems attempt to generate a circuit from a behavioral description \"out of the void\", using the entire design space as the search domain. Because of the vastness of the search space, it is impossible to do more than a coarse grain search, often resulting in inefficient designs. This approach ignores the designer's knowledge of the general structure of the circuit to be synthesized. In this paper, we describe the HLS system SIDER (Synthesis by Initial Design Extension and Refinement). SIDER utilizes designer knowledge about the design space in the form of an initial circuit. By limiting search to the neighborhood of this initial circuit, much finer grain search can be performed yielding a higher quality design. The effectiveness of the SIDER approach is shown by HLS of a 300 line C description of 27 instructions from a MC6502 CPU.","PeriodicalId":119232,"journal":{"name":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Search space reduction in high level synthesis by use of an initial circuit\",\"authors\":\"A. Masuda, Hiroshi Imai, J.P. Hansen, M. Sekine\",\"doi\":\"10.1109/ASPDAC.1995.486358\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Most existing high-level synthesis (HLS) systems attempt to generate a circuit from a behavioral description \\\"out of the void\\\", using the entire design space as the search domain. Because of the vastness of the search space, it is impossible to do more than a coarse grain search, often resulting in inefficient designs. This approach ignores the designer's knowledge of the general structure of the circuit to be synthesized. In this paper, we describe the HLS system SIDER (Synthesis by Initial Design Extension and Refinement). SIDER utilizes designer knowledge about the design space in the form of an initial circuit. By limiting search to the neighborhood of this initial circuit, much finer grain search can be performed yielding a higher quality design. The effectiveness of the SIDER approach is shown by HLS of a 300 line C description of 27 instructions from a MC6502 CPU.\",\"PeriodicalId\":119232,\"journal\":{\"name\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.1995.486358\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1995.486358","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
大多数现有的高级综合(high-level synthesis, HLS)系统试图从“无中生有”的行为描述中生成电路,使用整个设计空间作为搜索域。由于搜索空间的巨大,不可能进行比粗粒度搜索更多的搜索,这通常会导致低效的设计。这种方法忽略了设计者对要合成的电路的一般结构的了解。在本文中,我们描述了HLS系统的SIDER (Synthesis by Initial Design Extension and Refinement)。SIDER以初始电路的形式利用设计者关于设计空间的知识。通过将搜索限制在初始电路的邻域,可以执行更细粒度的搜索,从而产生更高质量的设计。来自MC6502 CPU的27条指令的300行C描述的HLS显示了SIDER方法的有效性。
Search space reduction in high level synthesis by use of an initial circuit
Most existing high-level synthesis (HLS) systems attempt to generate a circuit from a behavioral description "out of the void", using the entire design space as the search domain. Because of the vastness of the search space, it is impossible to do more than a coarse grain search, often resulting in inefficient designs. This approach ignores the designer's knowledge of the general structure of the circuit to be synthesized. In this paper, we describe the HLS system SIDER (Synthesis by Initial Design Extension and Refinement). SIDER utilizes designer knowledge about the design space in the form of an initial circuit. By limiting search to the neighborhood of this initial circuit, much finer grain search can be performed yielding a higher quality design. The effectiveness of the SIDER approach is shown by HLS of a 300 line C description of 27 instructions from a MC6502 CPU.