John A. Abbott, G. Hamilton, N. Kalidas, M. Murtuza, C. Thornton, S. Thomas, Y. Umeda, D. Malladi, D. Towne, S. Chao
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Design and development of a high performance PBGA package for the UltraSPARC-I/sup TM/ processor
This paper describes the development of a 520 terminal Plastic Ball Grid Array (PBGA) package to meet the system level requirements of the UltraSPARC-I/sup TM/ microprocessor. The Printed Circuit Board (PCB) substrate PBGA package developed was designed to handle chip operation above 200 MHz and dissipate 36 watts of power with the assistance of an integral heat sink and airflow. Mechanical stresses, board level reliability, thermal and electrical requirements are outlined. The package enhancements and process refinements executed to meet the design goals and reliability requirements are presented.
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