{"title":"一种新的位图分析技术——测试灵敏度强度位图","authors":"C. H. Gim","doi":"10.1109/IPFA.2002.1025626","DOIUrl":null,"url":null,"abstract":"Bitmapping is a common tool used for analysis and device characterisation on volatile and non-volatile memory in integrated circuits. The tester normally provides the electrical failing address and the analyst will use a scramble table to convert the electrical failing address to the physical failing address. A software may be used to descramble the electrical failing addresses and then display the physical location of the failure using simple graphics. In this paper, a novel bitmap technique is presented. Instead of just displaying the X,Y physical location of the failure, which is basically two dimensions, this bitmap technique takes it a step further. The new bitmap technique 'test sensitivity intensity (TSI) bitmap' is a graphical combination of all the listed tools. The idea of using a graphical bitmap was to make it easier to visualise the failure and the pattern of the failure as test conditions change from relaxed conditions to very stringent conditions, compared to a simple data dump memory display.","PeriodicalId":328714,"journal":{"name":"Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A novel bitmap analysis technique - test sensitivity intensity bitmap\",\"authors\":\"C. H. Gim\",\"doi\":\"10.1109/IPFA.2002.1025626\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Bitmapping is a common tool used for analysis and device characterisation on volatile and non-volatile memory in integrated circuits. The tester normally provides the electrical failing address and the analyst will use a scramble table to convert the electrical failing address to the physical failing address. A software may be used to descramble the electrical failing addresses and then display the physical location of the failure using simple graphics. In this paper, a novel bitmap technique is presented. Instead of just displaying the X,Y physical location of the failure, which is basically two dimensions, this bitmap technique takes it a step further. The new bitmap technique 'test sensitivity intensity (TSI) bitmap' is a graphical combination of all the listed tools. The idea of using a graphical bitmap was to make it easier to visualise the failure and the pattern of the failure as test conditions change from relaxed conditions to very stringent conditions, compared to a simple data dump memory display.\",\"PeriodicalId\":328714,\"journal\":{\"name\":\"Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-11-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2002.1025626\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2002.1025626","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel bitmap analysis technique - test sensitivity intensity bitmap
Bitmapping is a common tool used for analysis and device characterisation on volatile and non-volatile memory in integrated circuits. The tester normally provides the electrical failing address and the analyst will use a scramble table to convert the electrical failing address to the physical failing address. A software may be used to descramble the electrical failing addresses and then display the physical location of the failure using simple graphics. In this paper, a novel bitmap technique is presented. Instead of just displaying the X,Y physical location of the failure, which is basically two dimensions, this bitmap technique takes it a step further. The new bitmap technique 'test sensitivity intensity (TSI) bitmap' is a graphical combination of all the listed tools. The idea of using a graphical bitmap was to make it easier to visualise the failure and the pattern of the failure as test conditions change from relaxed conditions to very stringent conditions, compared to a simple data dump memory display.