N. Neelima, Aruru Sai Kumar, A. Jayanth, K. K. Mahitha, A. Dilip, K. Reddy
{"title":"高效数字递归类除法算法的实现","authors":"N. Neelima, Aruru Sai Kumar, A. Jayanth, K. K. Mahitha, A. Dilip, K. Reddy","doi":"10.1109/ACCESS57397.2023.10200084","DOIUrl":null,"url":null,"abstract":"The basic elements of an electronic system are arithmetic operations. Arithmetic operations are the building block of any electronic application and algorithm is a sequence of instructions used to carry out calculations or solve problems. In spite of the fact that addition, subtraction, multiplication, and division are fundamental components of arithmetic implementation in the electronic system, the implementation of division has received far less attention than the implementation of the other arithmetic operations. The process of dividing two numbers using the method results in the production of a quotient in addition to a remainder. The implementation of division operations is highly challenging; thus, in this scenario, a complex method is employed to ensure successful implementation. To be successful, a system has to have a solid performance in the division circuit. In this body of work, the Restoring division and Non-restoring division algorithms, which fall under the category of Digit Recurrence Class, have been developed for unsigned integers with data sizes of 8 bit, 16 bit, and 32 bit using the Verilog HDL programming language. These algorithms are applicable to unsigned integers with data values of 8, 16, and 32 bits respectively. In each of these algorithms, the calculation takes place in one of three registers designated by the letters A, Q, or M.","PeriodicalId":345351,"journal":{"name":"2023 3rd International Conference on Advances in Computing, Communication, Embedded and Secure Systems (ACCESS)","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Implementation of Efficient Digit Recurrence Class of Division Algorithms\",\"authors\":\"N. Neelima, Aruru Sai Kumar, A. Jayanth, K. K. Mahitha, A. Dilip, K. Reddy\",\"doi\":\"10.1109/ACCESS57397.2023.10200084\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The basic elements of an electronic system are arithmetic operations. Arithmetic operations are the building block of any electronic application and algorithm is a sequence of instructions used to carry out calculations or solve problems. In spite of the fact that addition, subtraction, multiplication, and division are fundamental components of arithmetic implementation in the electronic system, the implementation of division has received far less attention than the implementation of the other arithmetic operations. The process of dividing two numbers using the method results in the production of a quotient in addition to a remainder. The implementation of division operations is highly challenging; thus, in this scenario, a complex method is employed to ensure successful implementation. To be successful, a system has to have a solid performance in the division circuit. In this body of work, the Restoring division and Non-restoring division algorithms, which fall under the category of Digit Recurrence Class, have been developed for unsigned integers with data sizes of 8 bit, 16 bit, and 32 bit using the Verilog HDL programming language. These algorithms are applicable to unsigned integers with data values of 8, 16, and 32 bits respectively. In each of these algorithms, the calculation takes place in one of three registers designated by the letters A, Q, or M.\",\"PeriodicalId\":345351,\"journal\":{\"name\":\"2023 3rd International Conference on Advances in Computing, Communication, Embedded and Secure Systems (ACCESS)\",\"volume\":\"112 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 3rd International Conference on Advances in Computing, Communication, Embedded and Secure Systems (ACCESS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ACCESS57397.2023.10200084\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 3rd International Conference on Advances in Computing, Communication, Embedded and Secure Systems (ACCESS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ACCESS57397.2023.10200084","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation of Efficient Digit Recurrence Class of Division Algorithms
The basic elements of an electronic system are arithmetic operations. Arithmetic operations are the building block of any electronic application and algorithm is a sequence of instructions used to carry out calculations or solve problems. In spite of the fact that addition, subtraction, multiplication, and division are fundamental components of arithmetic implementation in the electronic system, the implementation of division has received far less attention than the implementation of the other arithmetic operations. The process of dividing two numbers using the method results in the production of a quotient in addition to a remainder. The implementation of division operations is highly challenging; thus, in this scenario, a complex method is employed to ensure successful implementation. To be successful, a system has to have a solid performance in the division circuit. In this body of work, the Restoring division and Non-restoring division algorithms, which fall under the category of Digit Recurrence Class, have been developed for unsigned integers with data sizes of 8 bit, 16 bit, and 32 bit using the Verilog HDL programming language. These algorithms are applicable to unsigned integers with data values of 8, 16, and 32 bits respectively. In each of these algorithms, the calculation takes place in one of three registers designated by the letters A, Q, or M.