M. Li, Y. Jiang, V. Y. Zhuo, E. Yeo, L. Law, K. Lim
{"title":"自遵从SET开关和多电平TaOx电阻存储器通过电流扫描操作","authors":"M. Li, Y. Jiang, V. Y. Zhuo, E. Yeo, L. Law, K. Lim","doi":"10.1109/NVMTS.2014.7060851","DOIUrl":null,"url":null,"abstract":"Ta/TaOx-based Resistive Random Access Memory (RRAM) is studied using current-sweeping (I-sweep) DC switching operation. The self-compliance SET program is achieved to prevent the device from current overshoot. The SET current and voltage are comparable with those measured by the conventional voltage-sweeping (V-sweep) operation, but better uniformity is realized. It is found that the high high-resistance-state (HRS) resistance results in lower I-sweep SET current but higher SET voltage. As opposed to the V-sweep switching process, the I-sweep SET is a gradual process. Therefore, the low-resistance-state (LRS) resistance can be controlled easily and reliably. It will be beneficial to a new multilevel cell design for high density memory applications.","PeriodicalId":275170,"journal":{"name":"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Self-compliance SET switching and multilevel TaOx resistive memory by current-sweep operation\",\"authors\":\"M. Li, Y. Jiang, V. Y. Zhuo, E. Yeo, L. Law, K. Lim\",\"doi\":\"10.1109/NVMTS.2014.7060851\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Ta/TaOx-based Resistive Random Access Memory (RRAM) is studied using current-sweeping (I-sweep) DC switching operation. The self-compliance SET program is achieved to prevent the device from current overshoot. The SET current and voltage are comparable with those measured by the conventional voltage-sweeping (V-sweep) operation, but better uniformity is realized. It is found that the high high-resistance-state (HRS) resistance results in lower I-sweep SET current but higher SET voltage. As opposed to the V-sweep switching process, the I-sweep SET is a gradual process. Therefore, the low-resistance-state (LRS) resistance can be controlled easily and reliably. It will be beneficial to a new multilevel cell design for high density memory applications.\",\"PeriodicalId\":275170,\"journal\":{\"name\":\"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NVMTS.2014.7060851\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NVMTS.2014.7060851","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Self-compliance SET switching and multilevel TaOx resistive memory by current-sweep operation
Ta/TaOx-based Resistive Random Access Memory (RRAM) is studied using current-sweeping (I-sweep) DC switching operation. The self-compliance SET program is achieved to prevent the device from current overshoot. The SET current and voltage are comparable with those measured by the conventional voltage-sweeping (V-sweep) operation, but better uniformity is realized. It is found that the high high-resistance-state (HRS) resistance results in lower I-sweep SET current but higher SET voltage. As opposed to the V-sweep switching process, the I-sweep SET is a gradual process. Therefore, the low-resistance-state (LRS) resistance can be controlled easily and reliably. It will be beneficial to a new multilevel cell design for high density memory applications.