High performance interpolation filter using direct computation

A Computational Filter (CF) that employs a sample calculation functional block is presented. CF significantly reduces the hardware requirements to realize an interpolation filter. The Computational Filter is compared with advanced Finite Impulse Response (CFIR). CFIR programmable filter is implemented using Computation Sharing Multiplication (CSHM) technique to optimize the conventional design. The proposed CF significantly reduces the implementation area as compared to CFIR. The maximum average error for wide range of interpolation factors from 8 to 256 is less than 3% for CF and 0.02 %for CFIR. Xilinx Virtex5 FPGA XC5VTX240T device is used to compare the proposed design and the advanced CFIR for different interpolation factors. The Computational Filter average reduction in hardware implementation is between 78.8 % and 97.1% for interpolation factor of 8 to 64. The maximum operating frequency for the CFIR is 1 MHZ.