采用超薄硅通道和30 nm栅极长度的高性能FDSOI器件接触衬里应力的影响

2005 IEEE International SOI Conference Proceedings Pub Date : 2005-12-27 DOI:10.1109/SOI.2005.1563580

D. V. Singh, J. Hergenrother, J. Sleight, Z. Ren, H. Nayfeh, O. Dokumaci, L. Black, D. Chidambarrao, R. Venigalla, J. Pan, B. Tessier, A. Nomura, J. Ott, M. Khare, K. Guarini, M. Ieong, W. Haensch

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引用次数: 5

摘要

我们首次研究了应力接触衬垫对具有凸起源/漏极的完全耗尽超薄通道CMOS器件性能的影响。nfet和pfet在迁移率和驱动电流方面都有显著的提高。观察到的增强表明，硅通道厚度和凸起源/漏极的高度与应力模拟结果一致。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Effect of contact liner stress in high-performance FDSOI devices with ultra-thin silicon channels and 30 nm gate lengths

We have investigated for the first time the effect of stressed contact liners on the performance of fully depleted ultra-thin channel CMOS devices with a raised source/drain. Significant enhancement in mobility and drive current is observed in both nFETs and pFETs. The observed enhancement shows a strong dependence on the Si channel thickness and the height of the raised source/drain, consistent with stress simulations.

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2005 IEEE International SOI Conference Proceedings

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