性价比高的H.264/AVC编码器的130nm TSMC前向变换和量化

Xuan-Tu Tran, Van-Huan Tran
{"title":"性价比高的H.264/AVC编码器的130nm TSMC前向变换和量化","authors":"Xuan-Tu Tran, Van-Huan Tran","doi":"10.1109/DDECS.2011.5783045","DOIUrl":null,"url":null,"abstract":"In this paper, we present a low cost Forward Transform and Quantization (FTQ) implementation for H.264/AVC encoders in mobile applications. To reduce the hardware implementation overhead, the proposed design uses only one unified architecture of 1-D transform engine to perform all required transform processes, including discrete cosine transform and Walsh Hadamard transform. This design also enables to share the common parts among multipliers that have the same multiplicands. The performance of the design is taken into consideration and improved by using a fast architecture of the multiplier in the quantizer, the most critical component in the design. Experimental results show that our architecture can completely finish transform and quantization processes for a 4∶2∶0 macroblock in 228 clock cycles and the achieved throughput is 445Msamples/s at 250MHz operating frequency while the area overhead is very small, 147755µm2 (approximate 15KGates), with the 130nm TSMC CMOS technology.","PeriodicalId":231389,"journal":{"name":"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems","volume":"121 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Cost-efficient 130nm TSMC Forward Transform and Quantization for H.264/AVC encoders\",\"authors\":\"Xuan-Tu Tran, Van-Huan Tran\",\"doi\":\"10.1109/DDECS.2011.5783045\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we present a low cost Forward Transform and Quantization (FTQ) implementation for H.264/AVC encoders in mobile applications. To reduce the hardware implementation overhead, the proposed design uses only one unified architecture of 1-D transform engine to perform all required transform processes, including discrete cosine transform and Walsh Hadamard transform. This design also enables to share the common parts among multipliers that have the same multiplicands. The performance of the design is taken into consideration and improved by using a fast architecture of the multiplier in the quantizer, the most critical component in the design. Experimental results show that our architecture can completely finish transform and quantization processes for a 4∶2∶0 macroblock in 228 clock cycles and the achieved throughput is 445Msamples/s at 250MHz operating frequency while the area overhead is very small, 147755µm2 (approximate 15KGates), with the 130nm TSMC CMOS technology.\",\"PeriodicalId\":231389,\"journal\":{\"name\":\"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems\",\"volume\":\"121 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-04-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DDECS.2011.5783045\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2011.5783045","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

摘要

本文提出了一种低成本的H.264/AVC编码器的前向变换和量化(FTQ)实现方法。为了减少硬件实现开销,本设计仅使用一个统一的一维变换引擎架构来执行所有所需的变换过程,包括离散余弦变换和Walsh Hadamard变换。这种设计还允许在具有相同乘数的乘法器之间共享公共部分。在设计中最关键的量化器中采用了快速的乘法器结构,从而提高了设计的性能。实验结果表明,我们的架构可以在228个时钟周期内完成4∶2∶0宏块的变换和量化过程,在250MHz工作频率下实现445Msamples/s的吞吐量,而面积开销非常小,为147755µm2(约15KGates),采用130nm TSMC CMOS技术。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Cost-efficient 130nm TSMC Forward Transform and Quantization for H.264/AVC encoders
In this paper, we present a low cost Forward Transform and Quantization (FTQ) implementation for H.264/AVC encoders in mobile applications. To reduce the hardware implementation overhead, the proposed design uses only one unified architecture of 1-D transform engine to perform all required transform processes, including discrete cosine transform and Walsh Hadamard transform. This design also enables to share the common parts among multipliers that have the same multiplicands. The performance of the design is taken into consideration and improved by using a fast architecture of the multiplier in the quantizer, the most critical component in the design. Experimental results show that our architecture can completely finish transform and quantization processes for a 4∶2∶0 macroblock in 228 clock cycles and the achieved throughput is 445Msamples/s at 250MHz operating frequency while the area overhead is very small, 147755µm2 (approximate 15KGates), with the 130nm TSMC CMOS technology.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Behavioral model of TRNG based on oscillator rings implemented in FPGA CAD tool for PLL Design High-performance hardware accelerators for sorting and managing priorities Defect-oriented module-level fault diagnosis in digital circuits Design-for-Test method for high-speed ADCs: Behavioral description and optimization
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1