弥合TCAD和ECAD方法在深亚微米互连提取和分析方面的差距

Nagaraj Ns, P. Balsara, C. Cantrell
{"title":"弥合TCAD和ECAD方法在深亚微米互连提取和分析方面的差距","authors":"Nagaraj Ns, P. Balsara, C. Cantrell","doi":"10.1109/ICVD.1999.745116","DOIUrl":null,"url":null,"abstract":"Dominance of interconnect parasitics in impacting functionality, performance and reliability in deep sub-micron (DSM) designs is a well known topic. Reduced metal pitches, process variations, new materials for metallization/dielectrics emphasizes an increased need for \"accurate\" technology modeling of interconnect. In the mean time, continued design integration, increased chip sizes and market pressures call for faster but \"accurate\" EDA methodologies and tools. This tutorial provides a complete perspective of the TCAD interconnect modeling issues and how these could be addressed in ECAD methodologies and tools.","PeriodicalId":443373,"journal":{"name":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","volume":"333 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-01-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Bridging the gap between TCAD and ECAD methodologies in deep sub-micron interconnect extraction and analysis\",\"authors\":\"Nagaraj Ns, P. Balsara, C. Cantrell\",\"doi\":\"10.1109/ICVD.1999.745116\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Dominance of interconnect parasitics in impacting functionality, performance and reliability in deep sub-micron (DSM) designs is a well known topic. Reduced metal pitches, process variations, new materials for metallization/dielectrics emphasizes an increased need for \\\"accurate\\\" technology modeling of interconnect. In the mean time, continued design integration, increased chip sizes and market pressures call for faster but \\\"accurate\\\" EDA methodologies and tools. This tutorial provides a complete perspective of the TCAD interconnect modeling issues and how these could be addressed in ECAD methodologies and tools.\",\"PeriodicalId\":443373,\"journal\":{\"name\":\"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)\",\"volume\":\"333 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-01-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICVD.1999.745116\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVD.1999.745116","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

在深亚微米(DSM)设计中,互连寄生对功能、性能和可靠性的影响是一个众所周知的话题。减少金属间距,工艺变化,金属化/电介质的新材料强调了对互连“精确”技术建模的需求增加。与此同时,持续的设计集成,芯片尺寸的增加和市场压力要求更快但“准确”的EDA方法和工具。本教程提供了TCAD互连建模问题的完整视角,以及如何在ECAD方法和工具中解决这些问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Bridging the gap between TCAD and ECAD methodologies in deep sub-micron interconnect extraction and analysis
Dominance of interconnect parasitics in impacting functionality, performance and reliability in deep sub-micron (DSM) designs is a well known topic. Reduced metal pitches, process variations, new materials for metallization/dielectrics emphasizes an increased need for "accurate" technology modeling of interconnect. In the mean time, continued design integration, increased chip sizes and market pressures call for faster but "accurate" EDA methodologies and tools. This tutorial provides a complete perspective of the TCAD interconnect modeling issues and how these could be addressed in ECAD methodologies and tools.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Improved effective capacitance computations for use in logic and layout optimization Assignment and reordering of incompletely specified pattern sequences targetting minimum power dissipation FzCRITIC-a functional timing verifier using a novel fuzzy delay model Verifying Tomasulo's algorithm by refinement Superscalar processor validation at the microarchitecture level
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1