R. Leung, K. Le, C. Sung, Y. Chu, G. Conner, R. Lane, J. de Jong
{"title":"7.5 ns 350 mW BiCMOS pal型器件","authors":"R. Leung, K. Le, C. Sung, Y. Chu, G. Conner, R. Lane, J. de Jong","doi":"10.1109/CICC.1989.56695","DOIUrl":null,"url":null,"abstract":"A BiCMOS PAL-type device is described. It has a propagation delay of 7.5 ns and consumes 350 mW of power. The circuit has eight inputs, four bidirectional input/outputs and four registered outputs (known as 16R4 in databooks). The technology is a twin-well, merged bipolar and CMOS (BiCMOS) process. The minimum feature size is 1.2 μm","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"102 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 7.5 ns 350 mW BiCMOS PAL-type device\",\"authors\":\"R. Leung, K. Le, C. Sung, Y. Chu, G. Conner, R. Lane, J. de Jong\",\"doi\":\"10.1109/CICC.1989.56695\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A BiCMOS PAL-type device is described. It has a propagation delay of 7.5 ns and consumes 350 mW of power. The circuit has eight inputs, four bidirectional input/outputs and four registered outputs (known as 16R4 in databooks). The technology is a twin-well, merged bipolar and CMOS (BiCMOS) process. The minimum feature size is 1.2 μm\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"102 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56695\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56695","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A BiCMOS PAL-type device is described. It has a propagation delay of 7.5 ns and consumes 350 mW of power. The circuit has eight inputs, four bidirectional input/outputs and four registered outputs (known as 16R4 in databooks). The technology is a twin-well, merged bipolar and CMOS (BiCMOS) process. The minimum feature size is 1.2 μm