Fast Prototyping of a Deep Neural Network on an FPGA

This paper describes a prototyping methodology for implementing deep neural network (DNN) models in hardware. From a DNN model developed in C or C++ programming language, we develop a hardware architecture using a SoC virtual platform and verify the functionality using FPGA board. It demonstrates the viability of using FPGAs for accelerating specific applications written in a high-level language. With the use of High-level Synthesis tools provided by Xilinx [3], it is shown to be possible to implement an FPGA design that would run the inference calculations required by the MobileNetV2 [1] Deep Neural Network. With minimal alterations to the C++ code developed for a software implementation of the MobileNetV2 where HDL code could be directly synthesized from the original C++ code, dramatically reducing the complexity of the project. Consequently, when the design was implemented on an FPGA, upwards of 5 times increase in speed was able to be realized when compared to similar processors (ARM7).