{"title":"超薄倒装芯片中的应力建模","authors":"P. Marjamaki, T. Reinikainen, J. Kivilahti","doi":"10.1109/ADHES.2000.860567","DOIUrl":null,"url":null,"abstract":"In the present study the effect of chip thickness on life expectancy of solder joints and on stresses in the chip in an underfilled flip chip assembly was investigated with FE analysis. By reducing the thickness of the silicon chip expected lifetime of the joints increased markedly. The life expectancies of the solderjoint based on energy method were 700, 860 and 1060 cycles for 600, 60 and 30 /spl mu/m thick chips, respectively. However, the reduction of the chip thickness increased normal stresses in the chip significantly. In the case of the thickest chip the highest compressive stress in the chip was about 90 MPa, while in the case of the thinnest chip it was about 290 MPa. So, by reducing the thickness the reliability of the solder joints increases but high stresses may cause reliability problems in the active chip.","PeriodicalId":222663,"journal":{"name":"4th International Conference on Adhesive Joining and Coating Technology in Electronics Manufacturing. Proceedings. Presented at Adhesives in Electronics 2000 (Cat. No.00EX431)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Modeling stresses in ultra-thin flip chips\",\"authors\":\"P. Marjamaki, T. Reinikainen, J. Kivilahti\",\"doi\":\"10.1109/ADHES.2000.860567\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the present study the effect of chip thickness on life expectancy of solder joints and on stresses in the chip in an underfilled flip chip assembly was investigated with FE analysis. By reducing the thickness of the silicon chip expected lifetime of the joints increased markedly. The life expectancies of the solderjoint based on energy method were 700, 860 and 1060 cycles for 600, 60 and 30 /spl mu/m thick chips, respectively. However, the reduction of the chip thickness increased normal stresses in the chip significantly. In the case of the thickest chip the highest compressive stress in the chip was about 90 MPa, while in the case of the thinnest chip it was about 290 MPa. So, by reducing the thickness the reliability of the solder joints increases but high stresses may cause reliability problems in the active chip.\",\"PeriodicalId\":222663,\"journal\":{\"name\":\"4th International Conference on Adhesive Joining and Coating Technology in Electronics Manufacturing. Proceedings. Presented at Adhesives in Electronics 2000 (Cat. No.00EX431)\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-06-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"4th International Conference on Adhesive Joining and Coating Technology in Electronics Manufacturing. Proceedings. Presented at Adhesives in Electronics 2000 (Cat. No.00EX431)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ADHES.2000.860567\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"4th International Conference on Adhesive Joining and Coating Technology in Electronics Manufacturing. Proceedings. Presented at Adhesives in Electronics 2000 (Cat. No.00EX431)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ADHES.2000.860567","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In the present study the effect of chip thickness on life expectancy of solder joints and on stresses in the chip in an underfilled flip chip assembly was investigated with FE analysis. By reducing the thickness of the silicon chip expected lifetime of the joints increased markedly. The life expectancies of the solderjoint based on energy method were 700, 860 and 1060 cycles for 600, 60 and 30 /spl mu/m thick chips, respectively. However, the reduction of the chip thickness increased normal stresses in the chip significantly. In the case of the thickest chip the highest compressive stress in the chip was about 90 MPa, while in the case of the thinnest chip it was about 290 MPa. So, by reducing the thickness the reliability of the solder joints increases but high stresses may cause reliability problems in the active chip.