Hans Kristian Otnes Berge, Amir Hasanbegovic, S. Aunet
{"title":"基于少数派3功能的穆勒c -元件,用于超低电压电源","authors":"Hans Kristian Otnes Berge, Amir Hasanbegovic, S. Aunet","doi":"10.1109/DDECS.2011.5783079","DOIUrl":null,"url":null,"abstract":"Multiobjective optimization taking area, power consumption and robustness into account was used to pick two implementations of the minority-3 function as building blocks to implement Muller C-elements. According to our simulations, the generally better among the two implementations was a 12 transistor implementation based on a 10 transistor minority-3 gate, when compared to a 24 transistor implementation based on 2-input nand, 2-input nor and invert functions. For room temperature and a supply voltage of 150mV, the simulated delays for the 12T and 24T implementations were 16.2 µs and 18.5 µs, respectively. The mean static power consumption figures were for the same conditions 2.6pW and 7.4pW, for the 12T and 24T implementations respectively. Switching energy was also simulated for a 150mV supply voltage. The switching energy for the 12T version of the Muller C-element was almost 44% lower compared to the 24T implementation. We also report delay, power and energy for a supply voltage of 300mV.","PeriodicalId":231389,"journal":{"name":"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Muller C-elements based on minority-3 functions for ultra low voltage supplies\",\"authors\":\"Hans Kristian Otnes Berge, Amir Hasanbegovic, S. Aunet\",\"doi\":\"10.1109/DDECS.2011.5783079\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Multiobjective optimization taking area, power consumption and robustness into account was used to pick two implementations of the minority-3 function as building blocks to implement Muller C-elements. According to our simulations, the generally better among the two implementations was a 12 transistor implementation based on a 10 transistor minority-3 gate, when compared to a 24 transistor implementation based on 2-input nand, 2-input nor and invert functions. For room temperature and a supply voltage of 150mV, the simulated delays for the 12T and 24T implementations were 16.2 µs and 18.5 µs, respectively. The mean static power consumption figures were for the same conditions 2.6pW and 7.4pW, for the 12T and 24T implementations respectively. Switching energy was also simulated for a 150mV supply voltage. The switching energy for the 12T version of the Muller C-element was almost 44% lower compared to the 24T implementation. We also report delay, power and energy for a supply voltage of 300mV.\",\"PeriodicalId\":231389,\"journal\":{\"name\":\"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-04-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DDECS.2011.5783079\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2011.5783079","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Muller C-elements based on minority-3 functions for ultra low voltage supplies
Multiobjective optimization taking area, power consumption and robustness into account was used to pick two implementations of the minority-3 function as building blocks to implement Muller C-elements. According to our simulations, the generally better among the two implementations was a 12 transistor implementation based on a 10 transistor minority-3 gate, when compared to a 24 transistor implementation based on 2-input nand, 2-input nor and invert functions. For room temperature and a supply voltage of 150mV, the simulated delays for the 12T and 24T implementations were 16.2 µs and 18.5 µs, respectively. The mean static power consumption figures were for the same conditions 2.6pW and 7.4pW, for the 12T and 24T implementations respectively. Switching energy was also simulated for a 150mV supply voltage. The switching energy for the 12T version of the Muller C-element was almost 44% lower compared to the 24T implementation. We also report delay, power and energy for a supply voltage of 300mV.