{"title":"一个完整的over - cell路由模型","authors":"M. Johann, R. da Luz Reis","doi":"10.1109/ASPDAC.1995.486412","DOIUrl":null,"url":null,"abstract":"This paper describes a Full Over-the-Cell routing model to perform circuit connections over the transistors by using \"transparent cells\". The methodology provides flexibility and the resulting layout style presents interesting performance/cost ratios if compared to those produced by Standard Cell and traditional Over-the-Cell routing models. A symbolic environment is shown, where it is possible to make the routing over real cell layouts, based on a restriction matrix. Some special routing techniques are mentioned and practical results are shown.","PeriodicalId":119232,"journal":{"name":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","volume":"72 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A Full Over-the-Cell routing model\",\"authors\":\"M. Johann, R. da Luz Reis\",\"doi\":\"10.1109/ASPDAC.1995.486412\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a Full Over-the-Cell routing model to perform circuit connections over the transistors by using \\\"transparent cells\\\". The methodology provides flexibility and the resulting layout style presents interesting performance/cost ratios if compared to those produced by Standard Cell and traditional Over-the-Cell routing models. A symbolic environment is shown, where it is possible to make the routing over real cell layouts, based on a restriction matrix. Some special routing techniques are mentioned and practical results are shown.\",\"PeriodicalId\":119232,\"journal\":{\"name\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"volume\":\"72 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.1995.486412\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1995.486412","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper describes a Full Over-the-Cell routing model to perform circuit connections over the transistors by using "transparent cells". The methodology provides flexibility and the resulting layout style presents interesting performance/cost ratios if compared to those produced by Standard Cell and traditional Over-the-Cell routing models. A symbolic environment is shown, where it is possible to make the routing over real cell layouts, based on a restriction matrix. Some special routing techniques are mentioned and practical results are shown.
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