Michael Schmidt, H. Gottlob, J. Bolten, T. Wahlbrink, Heinrich Kurz
{"title":"以硅酸钆为栅极介质的亚10nm纳米线nmosfet的迁移率提取","authors":"Michael Schmidt, H. Gottlob, J. Bolten, T. Wahlbrink, Heinrich Kurz","doi":"10.1109/ULIS.2011.5757996","DOIUrl":null,"url":null,"abstract":"Gadolinium-silicate (GdSiO) as high-k dielectric in sub 10nm gate first nanowire (NW) nMOSFETs is investigated. NW- and UTB- nMOSFETs with conventional SiO2/Poly-Si gate stacks have been fabricated and compared with GdSiO/TiN NW nMOSFETs. Specific nMOSFETs with multiple NWs in parallel have been used to extract the effective mobility by split-CV method and to eliminate the series resistance to correct the measured data.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Mobility extraction in sub 10nm nanowire nMOSFETs with gadolinium-silicate as gate dielectric\",\"authors\":\"Michael Schmidt, H. Gottlob, J. Bolten, T. Wahlbrink, Heinrich Kurz\",\"doi\":\"10.1109/ULIS.2011.5757996\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Gadolinium-silicate (GdSiO) as high-k dielectric in sub 10nm gate first nanowire (NW) nMOSFETs is investigated. NW- and UTB- nMOSFETs with conventional SiO2/Poly-Si gate stacks have been fabricated and compared with GdSiO/TiN NW nMOSFETs. Specific nMOSFETs with multiple NWs in parallel have been used to extract the effective mobility by split-CV method and to eliminate the series resistance to correct the measured data.\",\"PeriodicalId\":146779,\"journal\":{\"name\":\"Ulis 2011 Ultimate Integration on Silicon\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Ulis 2011 Ultimate Integration on Silicon\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ULIS.2011.5757996\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Ulis 2011 Ultimate Integration on Silicon","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ULIS.2011.5757996","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Mobility extraction in sub 10nm nanowire nMOSFETs with gadolinium-silicate as gate dielectric
Gadolinium-silicate (GdSiO) as high-k dielectric in sub 10nm gate first nanowire (NW) nMOSFETs is investigated. NW- and UTB- nMOSFETs with conventional SiO2/Poly-Si gate stacks have been fabricated and compared with GdSiO/TiN NW nMOSFETs. Specific nMOSFETs with multiple NWs in parallel have been used to extract the effective mobility by split-CV method and to eliminate the series resistance to correct the measured data.