{"title":"快速周转时间的专用集成电路设计使用KBSC","authors":"M. Tokuda, Z. Oka, H. Nakayama, H. Kobayashi","doi":"10.1109/ASIC.1990.186131","DOIUrl":null,"url":null,"abstract":"A quick turn-around time (QTAT) approach to ASIC design using a rule-based expert system called Knowledge Based Silicon Compiler (KBSC) is described. KBSC provides ASIC designers with an interactive graphic interface for flow chart entry to automatic logic synthesis. KBSC took approximately 1/5 the time required by non-KBSC methods.<<ETX>>","PeriodicalId":126693,"journal":{"name":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Quick turn around time ASIC design using KBSC\",\"authors\":\"M. Tokuda, Z. Oka, H. Nakayama, H. Kobayashi\",\"doi\":\"10.1109/ASIC.1990.186131\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A quick turn-around time (QTAT) approach to ASIC design using a rule-based expert system called Knowledge Based Silicon Compiler (KBSC) is described. KBSC provides ASIC designers with an interactive graphic interface for flow chart entry to automatic logic synthesis. KBSC took approximately 1/5 the time required by non-KBSC methods.<<ETX>>\",\"PeriodicalId\":126693,\"journal\":{\"name\":\"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-09-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1990.186131\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1990.186131","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A quick turn-around time (QTAT) approach to ASIC design using a rule-based expert system called Knowledge Based Silicon Compiler (KBSC) is described. KBSC provides ASIC designers with an interactive graphic interface for flow chart entry to automatic logic synthesis. KBSC took approximately 1/5 the time required by non-KBSC methods.<>