{"title":"用于3D集成的低温杂化晶圆键合","authors":"A. Damian, R. Poelma, H. V. van Zeijl, G. Zhang","doi":"10.1109/EUROSIME.2013.6529968","DOIUrl":null,"url":null,"abstract":"Techniques for the bonding of wafers and dies at low temperature are investigated. Controlled wet etching using acids is used to bond SiO2-SiO2 and Al-Al chips at room temperature. The bond strength is evaluated using die-shear tests. Infrared imaging and SEM analysis are used to inspect the bonding interface. The results are compared with data from fusion bonding experiments. Relatively high bond bond strengths for SiO2 and Al-terminated chips are achieved using bonding at room temperature.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Low temperature hybrid wafer bonding for 3D integration\",\"authors\":\"A. Damian, R. Poelma, H. V. van Zeijl, G. Zhang\",\"doi\":\"10.1109/EUROSIME.2013.6529968\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Techniques for the bonding of wafers and dies at low temperature are investigated. Controlled wet etching using acids is used to bond SiO2-SiO2 and Al-Al chips at room temperature. The bond strength is evaluated using die-shear tests. Infrared imaging and SEM analysis are used to inspect the bonding interface. The results are compared with data from fusion bonding experiments. Relatively high bond bond strengths for SiO2 and Al-terminated chips are achieved using bonding at room temperature.\",\"PeriodicalId\":270532,\"journal\":{\"name\":\"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-04-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EUROSIME.2013.6529968\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUROSIME.2013.6529968","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low temperature hybrid wafer bonding for 3D integration
Techniques for the bonding of wafers and dies at low temperature are investigated. Controlled wet etching using acids is used to bond SiO2-SiO2 and Al-Al chips at room temperature. The bond strength is evaluated using die-shear tests. Infrared imaging and SEM analysis are used to inspect the bonding interface. The results are compared with data from fusion bonding experiments. Relatively high bond bond strengths for SiO2 and Al-terminated chips are achieved using bonding at room temperature.
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