{"title":"电压可设计性:选择技术的推动者","authors":"R. Mandapati, B. Das, V. Ostwal, U. Ganguly","doi":"10.1109/NVMTS.2014.7060863","DOIUrl":null,"url":null,"abstract":"In this paper, first we evaluate array power performance using both Voltage Designable (VD) and Non-Voltage Designable (NVD) selection device (1S) technologies for (a) compatibility with range of memory (1M) operating voltages and currents and (b) selector variability. Firstly, cross-point (1S1M) on-off ratio degrades exponentially with NVD selectors for higher memory voltages while VD selectors provide immunity from such degradation by designing (increasing) the selector voltage. Consequently, array power increases exponentially for NVD selectors for higher memory voltages while it can be controlled effectively using VD selectors. Secondly, selector variability causes a necessary increase in cross-point voltage to ensure that majority (>99%) of the cross-points can be programmed. We show that selector variability also increases total array leakage (i.e Ioff). Designability of selector voltage available in VD selector enables the immunity from array power increase due to selector variability. Thus, VD selector is attractive due to its broad memory technology compatibility and selector variability immunity.","PeriodicalId":275170,"journal":{"name":"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Voltage Designability: An enabler for selector technology\",\"authors\":\"R. Mandapati, B. Das, V. Ostwal, U. Ganguly\",\"doi\":\"10.1109/NVMTS.2014.7060863\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, first we evaluate array power performance using both Voltage Designable (VD) and Non-Voltage Designable (NVD) selection device (1S) technologies for (a) compatibility with range of memory (1M) operating voltages and currents and (b) selector variability. Firstly, cross-point (1S1M) on-off ratio degrades exponentially with NVD selectors for higher memory voltages while VD selectors provide immunity from such degradation by designing (increasing) the selector voltage. Consequently, array power increases exponentially for NVD selectors for higher memory voltages while it can be controlled effectively using VD selectors. Secondly, selector variability causes a necessary increase in cross-point voltage to ensure that majority (>99%) of the cross-points can be programmed. We show that selector variability also increases total array leakage (i.e Ioff). Designability of selector voltage available in VD selector enables the immunity from array power increase due to selector variability. Thus, VD selector is attractive due to its broad memory technology compatibility and selector variability immunity.\",\"PeriodicalId\":275170,\"journal\":{\"name\":\"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NVMTS.2014.7060863\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NVMTS.2014.7060863","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Voltage Designability: An enabler for selector technology
In this paper, first we evaluate array power performance using both Voltage Designable (VD) and Non-Voltage Designable (NVD) selection device (1S) technologies for (a) compatibility with range of memory (1M) operating voltages and currents and (b) selector variability. Firstly, cross-point (1S1M) on-off ratio degrades exponentially with NVD selectors for higher memory voltages while VD selectors provide immunity from such degradation by designing (increasing) the selector voltage. Consequently, array power increases exponentially for NVD selectors for higher memory voltages while it can be controlled effectively using VD selectors. Secondly, selector variability causes a necessary increase in cross-point voltage to ensure that majority (>99%) of the cross-points can be programmed. We show that selector variability also increases total array leakage (i.e Ioff). Designability of selector voltage available in VD selector enables the immunity from array power increase due to selector variability. Thus, VD selector is attractive due to its broad memory technology compatibility and selector variability immunity.