电压可设计性:选择技术的推动者

R. Mandapati, B. Das, V. Ostwal, U. Ganguly
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引用次数: 2

摘要

在本文中,我们首先使用电压可设计(VD)和非电压可设计(NVD)选择器件(1S)技术评估阵列功率性能,用于(a)与存储范围(1M)工作电压和电流的兼容性以及(b)选择器可变性。首先,交叉点(1S1M)通断比使用NVD选择器时呈指数级下降,而VD选择器通过设计(增加)选择器电压来抵抗这种下降。因此,NVD选择器的阵列功率呈指数级增长,用于更高的存储电压,同时可以使用VD选择器有效地控制它。其次,选择器可变性导致交叉点电压的必要增加,以确保大多数(bbb99 %)的交叉点可以编程。我们表明,选择器的可变性也增加了总阵列泄漏(即Ioff)。VD选择器中可用的选择电压的可设计性使得阵列功率的抗扰度由于选择器的可变性而增加。因此,VD选择器因其广泛的存储技术兼容性和选择器的可变性免疫而具有吸引力。
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Voltage Designability: An enabler for selector technology
In this paper, first we evaluate array power performance using both Voltage Designable (VD) and Non-Voltage Designable (NVD) selection device (1S) technologies for (a) compatibility with range of memory (1M) operating voltages and currents and (b) selector variability. Firstly, cross-point (1S1M) on-off ratio degrades exponentially with NVD selectors for higher memory voltages while VD selectors provide immunity from such degradation by designing (increasing) the selector voltage. Consequently, array power increases exponentially for NVD selectors for higher memory voltages while it can be controlled effectively using VD selectors. Secondly, selector variability causes a necessary increase in cross-point voltage to ensure that majority (>99%) of the cross-points can be programmed. We show that selector variability also increases total array leakage (i.e Ioff). Designability of selector voltage available in VD selector enables the immunity from array power increase due to selector variability. Thus, VD selector is attractive due to its broad memory technology compatibility and selector variability immunity.
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