{"title":"异步微管道电路的系统级性能模型","authors":"B. Oelmann, H. Tenhunen","doi":"10.1109/ICECS.1996.584543","DOIUrl":null,"url":null,"abstract":"In this paper we present how an asynchronous system, using micropipelines, can be modelled in a system level performance model. We have introduced structures for pipeline stages and feedback structures. The model has been used in order to find out at what complexity a micropipeline implementation can out-perform a synchronous one. We have also used it for examining if micropipelines can be used as an alternative to clock-gating as a method for saving power. Results from these simulations are presented and compared to measurements on a complex asynchronous circuit.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A system level performance model for asynchronous micropipeline circuits\",\"authors\":\"B. Oelmann, H. Tenhunen\",\"doi\":\"10.1109/ICECS.1996.584543\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present how an asynchronous system, using micropipelines, can be modelled in a system level performance model. We have introduced structures for pipeline stages and feedback structures. The model has been used in order to find out at what complexity a micropipeline implementation can out-perform a synchronous one. We have also used it for examining if micropipelines can be used as an alternative to clock-gating as a method for saving power. Results from these simulations are presented and compared to measurements on a complex asynchronous circuit.\",\"PeriodicalId\":402369,\"journal\":{\"name\":\"Proceedings of Third International Conference on Electronics, Circuits, and Systems\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Third International Conference on Electronics, Circuits, and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.1996.584543\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.1996.584543","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A system level performance model for asynchronous micropipeline circuits
In this paper we present how an asynchronous system, using micropipelines, can be modelled in a system level performance model. We have introduced structures for pipeline stages and feedback structures. The model has been used in order to find out at what complexity a micropipeline implementation can out-perform a synchronous one. We have also used it for examining if micropipelines can be used as an alternative to clock-gating as a method for saving power. Results from these simulations are presented and compared to measurements on a complex asynchronous circuit.
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