{"title":"互连结构电容矩阵的快速计算技术","authors":"V. Veremey, R. Mittra","doi":"10.1109/EPEP.1997.634081","DOIUrl":null,"url":null,"abstract":"A finite difference (FD) method for rapid and accurate evaluation of capacitance matrices of interconnect configurations is described. Novel techniques for the truncation of FD mesh, that significantly reduce the CPU time, are presented.","PeriodicalId":220951,"journal":{"name":"Electrical Performance of Electronic Packaging","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A technique for fast calculations of capacitance matrices of interconnect structures\",\"authors\":\"V. Veremey, R. Mittra\",\"doi\":\"10.1109/EPEP.1997.634081\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A finite difference (FD) method for rapid and accurate evaluation of capacitance matrices of interconnect configurations is described. Novel techniques for the truncation of FD mesh, that significantly reduce the CPU time, are presented.\",\"PeriodicalId\":220951,\"journal\":{\"name\":\"Electrical Performance of Electronic Packaging\",\"volume\":\"112 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electrical Performance of Electronic Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.1997.634081\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Performance of Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.1997.634081","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A technique for fast calculations of capacitance matrices of interconnect structures
A finite difference (FD) method for rapid and accurate evaluation of capacitance matrices of interconnect configurations is described. Novel techniques for the truncation of FD mesh, that significantly reduce the CPU time, are presented.