Analysis of process-induced charges created in MOSFETs and related collection test structures

The use of gate isolated test transistors can lead to the creation of process-induced charges which cannot occur on transistors implemented on circuits. A test structure has been designed to separate the intrinsic process related defects which can result in yield losses on circuits, and the charges or states created in the devices usually used in test patterns. With the use of this collection test structure (CTS), the influence of the different process steps in terms of creation of charges can be identified; in particular, the role of the last steps can be pointed out.<>