D. Drouin, Mohamed Amine-Bounouar, G. Droulers, M. Labalette, M. Pioro-Ladrière, A. Souifi, S. Ecoffey
{"title":"3D微电子与BEOL兼容的设备","authors":"D. Drouin, Mohamed Amine-Bounouar, G. Droulers, M. Labalette, M. Pioro-Ladrière, A. Souifi, S. Ecoffey","doi":"10.1109/VTS.2015.7116262","DOIUrl":null,"url":null,"abstract":"This presentation will address the potential of nanoelectronic devices 3D monolithic integration in the CMOS back-end-of-line (BEOL) to add functionality and enhance integrated circuits (ICs) performances.","PeriodicalId":187545,"journal":{"name":"2015 IEEE 33rd VLSI Test Symposium (VTS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"3D microelectronic with BEOL compatible devices\",\"authors\":\"D. Drouin, Mohamed Amine-Bounouar, G. Droulers, M. Labalette, M. Pioro-Ladrière, A. Souifi, S. Ecoffey\",\"doi\":\"10.1109/VTS.2015.7116262\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This presentation will address the potential of nanoelectronic devices 3D monolithic integration in the CMOS back-end-of-line (BEOL) to add functionality and enhance integrated circuits (ICs) performances.\",\"PeriodicalId\":187545,\"journal\":{\"name\":\"2015 IEEE 33rd VLSI Test Symposium (VTS)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-04-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 33rd VLSI Test Symposium (VTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTS.2015.7116262\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 33rd VLSI Test Symposium (VTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS.2015.7116262","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This presentation will address the potential of nanoelectronic devices 3D monolithic integration in the CMOS back-end-of-line (BEOL) to add functionality and enhance integrated circuits (ICs) performances.