衬底减薄和结侧冷却对Ga2O3二极管热性能的影响

F. Wilhelmi, Y. Komatsu, S. Yamaguchi, Y. Uchida, R. Nemoto, A. Lindemann
{"title":"衬底减薄和结侧冷却对Ga2O3二极管热性能的影响","authors":"F. Wilhelmi, Y. Komatsu, S. Yamaguchi, Y. Uchida, R. Nemoto, A. Lindemann","doi":"10.23919/ICEP55381.2022.9795473","DOIUrl":null,"url":null,"abstract":"Gallium oxide (Ga2O3) has gained interest as a material for power electronic devices, but its low thermal conductivity poses a substantial challenge. Therefore, this paper investigates assembly strategies for Ga2O3 power diodes using simulative and experimental thermal studies. By substrate thinning from 600 μm to 200 μm, the maximum chip temperature is reduced by more than one third. The lowest rise in junction temperature, close to that of a commercial SiC Schottky diode, can be achieved by flip-chip assembly when the entire anode area is contacted. Yet, small gaps in the contacting area can significantly increase the local peak temperature.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"281 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Effect of Substrate Thinning and Junction-Side Cooling on Thermal Properties of Ga2O3 Diodes\",\"authors\":\"F. Wilhelmi, Y. Komatsu, S. Yamaguchi, Y. Uchida, R. Nemoto, A. Lindemann\",\"doi\":\"10.23919/ICEP55381.2022.9795473\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Gallium oxide (Ga2O3) has gained interest as a material for power electronic devices, but its low thermal conductivity poses a substantial challenge. Therefore, this paper investigates assembly strategies for Ga2O3 power diodes using simulative and experimental thermal studies. By substrate thinning from 600 μm to 200 μm, the maximum chip temperature is reduced by more than one third. The lowest rise in junction temperature, close to that of a commercial SiC Schottky diode, can be achieved by flip-chip assembly when the entire anode area is contacted. Yet, small gaps in the contacting area can significantly increase the local peak temperature.\",\"PeriodicalId\":413776,\"journal\":{\"name\":\"2022 International Conference on Electronics Packaging (ICEP)\",\"volume\":\"281 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-05-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 International Conference on Electronics Packaging (ICEP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/ICEP55381.2022.9795473\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Electronics Packaging (ICEP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/ICEP55381.2022.9795473","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

氧化镓(Ga2O3)作为一种电力电子器件材料已引起人们的兴趣,但其低导热性带来了实质性的挑战。因此,本文通过模拟和实验热研究来研究Ga2O3功率二极管的组装策略。通过将衬底从600 μm减薄到200 μm,芯片最高温度降低了三分之一以上。当整个阳极区域接触时,可以通过倒装芯片组装实现结温的最低上升,接近商用SiC肖特基二极管的结温。然而,接触区域的小间隙可以显著提高局部峰值温度。
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Effect of Substrate Thinning and Junction-Side Cooling on Thermal Properties of Ga2O3 Diodes
Gallium oxide (Ga2O3) has gained interest as a material for power electronic devices, but its low thermal conductivity poses a substantial challenge. Therefore, this paper investigates assembly strategies for Ga2O3 power diodes using simulative and experimental thermal studies. By substrate thinning from 600 μm to 200 μm, the maximum chip temperature is reduced by more than one third. The lowest rise in junction temperature, close to that of a commercial SiC Schottky diode, can be achieved by flip-chip assembly when the entire anode area is contacted. Yet, small gaps in the contacting area can significantly increase the local peak temperature.
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