{"title":"低温原位磷掺杂单晶硅发射体在SiGe HBTs中的应用","authors":"A.I. Abdul-Rahim, C. Marsh, P. Ashburn, G. Booker","doi":"10.1109/SMELEC.2002.1217812","DOIUrl":null,"url":null,"abstract":"SiGe Heterojunction Bipolar Transistors (HBTs) require low temperature processing in order to minimize Boron-out diffusion from the base region. In this paper a novel technique of producing low temperature in-situ Phosphorus doped single-crystal silicon emitters for application in SiGe HBTs is presented. The single-crystal silicon was deposited at a temperature of 670/spl deg/C in a UHV-compatible LPCVD cluster tool. Gummel plots of the fabricated transistors show very ideal base and collector current characteristics. An ultra low emitter resistance of 6.6 /spl Omega/./spl mu/m/sup 2/ was also obtained. The very low emitter resistance is due to very low oxygen dose of 5.3/spl times/10/sup 13/ cm/sup -2/ at the single-crystal silicon emitter/silicon substrate interface. The commercial Silvaco TCAD ATHENA and ATLAS were used to model the DC characteristics of the transistor to validate the results.","PeriodicalId":211819,"journal":{"name":"ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Low temperature in-situ phosphorus doped single-crystal silicon emitters for application in SiGe HBTs\",\"authors\":\"A.I. Abdul-Rahim, C. Marsh, P. Ashburn, G. Booker\",\"doi\":\"10.1109/SMELEC.2002.1217812\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"SiGe Heterojunction Bipolar Transistors (HBTs) require low temperature processing in order to minimize Boron-out diffusion from the base region. In this paper a novel technique of producing low temperature in-situ Phosphorus doped single-crystal silicon emitters for application in SiGe HBTs is presented. The single-crystal silicon was deposited at a temperature of 670/spl deg/C in a UHV-compatible LPCVD cluster tool. Gummel plots of the fabricated transistors show very ideal base and collector current characteristics. An ultra low emitter resistance of 6.6 /spl Omega/./spl mu/m/sup 2/ was also obtained. The very low emitter resistance is due to very low oxygen dose of 5.3/spl times/10/sup 13/ cm/sup -2/ at the single-crystal silicon emitter/silicon substrate interface. The commercial Silvaco TCAD ATHENA and ATLAS were used to model the DC characteristics of the transistor to validate the results.\",\"PeriodicalId\":211819,\"journal\":{\"name\":\"ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMELEC.2002.1217812\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2002.1217812","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low temperature in-situ phosphorus doped single-crystal silicon emitters for application in SiGe HBTs
SiGe Heterojunction Bipolar Transistors (HBTs) require low temperature processing in order to minimize Boron-out diffusion from the base region. In this paper a novel technique of producing low temperature in-situ Phosphorus doped single-crystal silicon emitters for application in SiGe HBTs is presented. The single-crystal silicon was deposited at a temperature of 670/spl deg/C in a UHV-compatible LPCVD cluster tool. Gummel plots of the fabricated transistors show very ideal base and collector current characteristics. An ultra low emitter resistance of 6.6 /spl Omega/./spl mu/m/sup 2/ was also obtained. The very low emitter resistance is due to very low oxygen dose of 5.3/spl times/10/sup 13/ cm/sup -2/ at the single-crystal silicon emitter/silicon substrate interface. The commercial Silvaco TCAD ATHENA and ATLAS were used to model the DC characteristics of the transistor to validate the results.