{"title":"实现可扩展的嵌入式FPGA SOC","authors":"H. Mrabet, Z. Marrakchi, H. Mehrez, A. Tissot","doi":"10.1109/DTIS.2006.1708687","DOIUrl":null,"url":null,"abstract":"Integrating an embedded FPGA into SoC allows post-fabrication changes. Thanks to their unlimited reconfigurability, eFPGAs are able to implement specific functions, thus improves the systems performance. In this paper the authors present an SRAM-based eFPGA architecture. The authors explore the hardware aspects of the eFPGA including internal structure and external coupling with a VCI interconnect. The authors also focus on the design flow for the implementation and the configuration","PeriodicalId":399250,"journal":{"name":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Implementation of scalable embedded FPGA for SOC\",\"authors\":\"H. Mrabet, Z. Marrakchi, H. Mehrez, A. Tissot\",\"doi\":\"10.1109/DTIS.2006.1708687\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Integrating an embedded FPGA into SoC allows post-fabrication changes. Thanks to their unlimited reconfigurability, eFPGAs are able to implement specific functions, thus improves the systems performance. In this paper the authors present an SRAM-based eFPGA architecture. The authors explore the hardware aspects of the eFPGA including internal structure and external coupling with a VCI interconnect. The authors also focus on the design flow for the implementation and the configuration\",\"PeriodicalId\":399250,\"journal\":{\"name\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS.2006.1708687\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2006.1708687","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Integrating an embedded FPGA into SoC allows post-fabrication changes. Thanks to their unlimited reconfigurability, eFPGAs are able to implement specific functions, thus improves the systems performance. In this paper the authors present an SRAM-based eFPGA architecture. The authors explore the hardware aspects of the eFPGA including internal structure and external coupling with a VCI interconnect. The authors also focus on the design flow for the implementation and the configuration