Scaling trends and challenges of advanced memory technology

Summary form only given. DRAM and NAND technologies have been successfully developed so far thanks to advanced patterning and device technologies, meeting high density, high performance and low cost requirements. However, imminent scaling limit in DRAM and NAND requires breakthrough technologies to meet market needs. DRAM technology in 1xnm and beyond faces severe challenges, such as difficulties in obtaining sufficient storage capacitance and sensing margin. To alleviate the problems, new materials for cell capacitor should be exploited and systematic aids such as error correction should be considered. Besides these scaling issues, DRAM has been suffering from performance issue, and it requires enhanced peripheral transistor performance with low power and high speed by using new process technologies such as HKMG. A 3D integration with TSV provides a new solution for high density, high speed, low power, and wider bandwidth without traditional device geometric scaling. However, 3D has its own challenges such as high manufacturing cost and reliability that need to be overcome before it could be widely used. 3D NAND flash memory technologies have been studied as a strong contender due to their potential for replacing conventional 2D floating gate cell. Recently, there has been remarkable progresses towards mass production even though their inherent issues of poor data retention and process complexity. Several challenges such as process, material, and cell architecture will be discussed. New non-volatile memories such as ReRAM, PRAM and STT-MRAM have undergone explosive study in the past decade. ReRAM and PRAM are now leading candidates to replace conventional NAND or NOR flash memories and to pioneer the field of Storage Class Memories, while STT-MRAM is regarded as the only a non-volatile memory that can have the performance of DRAM due to its high-speed read/write and excellent cycling endurance. Device characteristics of new non-volatile memories, key technology of device integration and materials will be discussed.