用于高性能时钟的1V, 1mW, 4GHz注入锁定振荡器

Lin Zhang, B. Ciftcioglu, Hui Wu
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引用次数: 16

摘要

注入锁定时钟(ILC)先前已被提出,以改善倾斜和抖动性能,同时降低多千兆赫时钟分配网络的功耗。本文提出了一种适用于ILC应用的注入锁定振荡器(ILO)的新设计。它使用变压器产生差分信号,然后直接注入ILO核心。它还集成了用于频率调谐的开关电容阵列,因此在ILC中具有数字工作台。在0.18 μ m标准数字CMOS上设计并制作了一个4ghz测试芯片。它由平衡h树驱动的4个ilo组成。每台ILO从1v电源中消耗的电量小于1mw。5位数字桌面实现55ps延迟调谐范围和1.8 ps分辨率。测量表明,在频率偏移高达600 kHz时,仅引入了30 fs周期到周期的抖动退化,并且没有相位噪声退化。
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A 1V, 1mW, 4GHz Injection-Locked Oscillator for High-Performance Clocking
Injection-locked clocking (ILC) has been proposed previously to improve the skew and jitter performance while reducing the power consumption in multi-gigahertz clock distribution networks. This paper presents a new design of the injection-locked oscillator (ILO) suitable for ILC applications. It uses a transformer to generate differential signals and then directly inject them into the ILO core. It also incorporates a switched-capacitor array for frequency tuning and hence digital deskew in ILC. A 4 GHz test chip was designed and fabricated in a 0.18 mum standard digital CMOS. It consists of four ILOs driven by a balanced H-tree. Each ILO consumes less than 1 mW from a 1 V power supply. 5-bit digital deskew achieves 55 ps delay tuning range and 1.8 ps resolution. Measurement shows that only 30 fs cycle-to-cycle jitter degradation was introduced and no phase noise degradation at frequency offset up to 600 kHz.
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