Elizabeth Kho Ching Tee, M. Antoniou, D. Green, A. Hölke, F. Udrea
{"title":"375V部分SOI SJ LDNMOS北斗系统限制的三维仿真研究","authors":"Elizabeth Kho Ching Tee, M. Antoniou, D. Green, A. Hölke, F. Udrea","doi":"10.1109/ISPSD57135.2023.10147409","DOIUrl":null,"url":null,"abstract":"This paper investigates novel techniques of extending the breakdown voltage (BDS) capability of the partial silicon-on-insulator SJ LDNMOS up to 460V. This is based on a unique combination of two different concepts and technologies, namely the Partial Silicon-On-Insulator (PSOI) and Superjunction (SJ) to achieve a highly effective platform for Power Integrated Circuit. The device BDS sensitivity to the handle wafer diode voltage is mitigated by using a novel 3D design based on “domain decomposition” 3D TCAD simulations. The hot spot location in the complex termination area, which is due to out-of-plane (90°) bending of electrostatic potential lines towards the midpoint of the device area, is successfully identified and eliminated.","PeriodicalId":344266,"journal":{"name":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"367 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"3D simulation study of 375V partial SOI SJ LDNMOS BDS limitation\",\"authors\":\"Elizabeth Kho Ching Tee, M. Antoniou, D. Green, A. Hölke, F. Udrea\",\"doi\":\"10.1109/ISPSD57135.2023.10147409\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates novel techniques of extending the breakdown voltage (BDS) capability of the partial silicon-on-insulator SJ LDNMOS up to 460V. This is based on a unique combination of two different concepts and technologies, namely the Partial Silicon-On-Insulator (PSOI) and Superjunction (SJ) to achieve a highly effective platform for Power Integrated Circuit. The device BDS sensitivity to the handle wafer diode voltage is mitigated by using a novel 3D design based on “domain decomposition” 3D TCAD simulations. The hot spot location in the complex termination area, which is due to out-of-plane (90°) bending of electrostatic potential lines towards the midpoint of the device area, is successfully identified and eliminated.\",\"PeriodicalId\":344266,\"journal\":{\"name\":\"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)\",\"volume\":\"367 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD57135.2023.10147409\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD57135.2023.10147409","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3D simulation study of 375V partial SOI SJ LDNMOS BDS limitation
This paper investigates novel techniques of extending the breakdown voltage (BDS) capability of the partial silicon-on-insulator SJ LDNMOS up to 460V. This is based on a unique combination of two different concepts and technologies, namely the Partial Silicon-On-Insulator (PSOI) and Superjunction (SJ) to achieve a highly effective platform for Power Integrated Circuit. The device BDS sensitivity to the handle wafer diode voltage is mitigated by using a novel 3D design based on “domain decomposition” 3D TCAD simulations. The hot spot location in the complex termination area, which is due to out-of-plane (90°) bending of electrostatic potential lines towards the midpoint of the device area, is successfully identified and eliminated.
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