I. Ben Akkez, C. Fenouillet-Béranger, A. Cros, P. Perreau, S. Haendler, O. Weber, F. Andrieu, D. Pellissier-Tanon, F. Abbate, C. Richard, R. Beneyton, P. Gouraud, A. Margain, C. Borowiak, E. Gourvest, K. Bourdelle, B. Nguyen, T. Poiroux, T. Skotnicki, O. Faynot, F. Balestra, G. Ghibaudo, F. Boeuf
{"title":"衬底取向对超薄盒完全耗尽SOI电性能的影响","authors":"I. Ben Akkez, C. Fenouillet-Béranger, A. Cros, P. Perreau, S. Haendler, O. Weber, F. Andrieu, D. Pellissier-Tanon, F. Abbate, C. Richard, R. Beneyton, P. Gouraud, A. Margain, C. Borowiak, E. Gourvest, K. Bourdelle, B. Nguyen, T. Poiroux, T. Skotnicki, O. Faynot, F. Balestra, G. Ghibaudo, F. Boeuf","doi":"10.1109/ULIS.2012.6193386","DOIUrl":null,"url":null,"abstract":"In this paper, we compare the electrical properties of Ultra Thin Buried Oxide (UTBOX) Fully Depleted Silicon On Insulator (FD-SOI) MOS devices for rotated and not rotated substrate with different gate lengths. We found a significant performance enhancement on FD-SOI PMOSFETs as expected, while keeping a good control of short channel effects. Surprisingly, to a lower extent, an improvement is also found for NMOS devices. We have also studied the carrier mobility degradation as a function of temperature and we point out the contribution of different mechanisms that reduce the mobility such as impurity Coulomb scattering, phonons and neutral defects as a function gate length. We find that there is no significant effect of rotated substrate on the mobility degradation. All these results are discussed and possible explanations are also given.","PeriodicalId":350544,"journal":{"name":"2012 13th International Conference on Ultimate Integration on Silicon (ULIS)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Impact of substrate orientation on Ultra Thin BOX Fully Depleted SOI electrical performances\",\"authors\":\"I. Ben Akkez, C. Fenouillet-Béranger, A. Cros, P. Perreau, S. Haendler, O. Weber, F. Andrieu, D. Pellissier-Tanon, F. Abbate, C. Richard, R. Beneyton, P. Gouraud, A. Margain, C. Borowiak, E. Gourvest, K. Bourdelle, B. Nguyen, T. Poiroux, T. Skotnicki, O. Faynot, F. Balestra, G. Ghibaudo, F. Boeuf\",\"doi\":\"10.1109/ULIS.2012.6193386\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we compare the electrical properties of Ultra Thin Buried Oxide (UTBOX) Fully Depleted Silicon On Insulator (FD-SOI) MOS devices for rotated and not rotated substrate with different gate lengths. We found a significant performance enhancement on FD-SOI PMOSFETs as expected, while keeping a good control of short channel effects. Surprisingly, to a lower extent, an improvement is also found for NMOS devices. We have also studied the carrier mobility degradation as a function of temperature and we point out the contribution of different mechanisms that reduce the mobility such as impurity Coulomb scattering, phonons and neutral defects as a function gate length. We find that there is no significant effect of rotated substrate on the mobility degradation. All these results are discussed and possible explanations are also given.\",\"PeriodicalId\":350544,\"journal\":{\"name\":\"2012 13th International Conference on Ultimate Integration on Silicon (ULIS)\",\"volume\":\"89 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-03-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 13th International Conference on Ultimate Integration on Silicon (ULIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ULIS.2012.6193386\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 13th International Conference on Ultimate Integration on Silicon (ULIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ULIS.2012.6193386","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Impact of substrate orientation on Ultra Thin BOX Fully Depleted SOI electrical performances
In this paper, we compare the electrical properties of Ultra Thin Buried Oxide (UTBOX) Fully Depleted Silicon On Insulator (FD-SOI) MOS devices for rotated and not rotated substrate with different gate lengths. We found a significant performance enhancement on FD-SOI PMOSFETs as expected, while keeping a good control of short channel effects. Surprisingly, to a lower extent, an improvement is also found for NMOS devices. We have also studied the carrier mobility degradation as a function of temperature and we point out the contribution of different mechanisms that reduce the mobility such as impurity Coulomb scattering, phonons and neutral defects as a function gate length. We find that there is no significant effect of rotated substrate on the mobility degradation. All these results are discussed and possible explanations are also given.