{"title":"容错NoC体系结构中的高效错误恢复方案","authors":"Martin Strava","doi":"10.1109/DDECS.2019.8724641","DOIUrl":null,"url":null,"abstract":"This paper presents a novel online fault tolerance method for network-on-chip (NoC) interconnects targeting both permanent and transient faults. We introduce a concept of retransmission credit as a method of distinguishing between permanent and transient faults. Another concept of monitoring errors separately on two types of interconnects – inter-switch links and intra-switch input/output port paths – is also employed. The concept introduced allows more efficient routing in comparison to existing error recovery schemes. Experimental validation shows that the proposed NoC error recovery scheme utilising both the concepts delivers better or at least similar performance when compared to existing NoC error recovery schemes.","PeriodicalId":114139,"journal":{"name":"IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Efficient Error Recovery Scheme in Fault-tolerant NoC Architectures\",\"authors\":\"Martin Strava\",\"doi\":\"10.1109/DDECS.2019.8724641\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a novel online fault tolerance method for network-on-chip (NoC) interconnects targeting both permanent and transient faults. We introduce a concept of retransmission credit as a method of distinguishing between permanent and transient faults. Another concept of monitoring errors separately on two types of interconnects – inter-switch links and intra-switch input/output port paths – is also employed. The concept introduced allows more efficient routing in comparison to existing error recovery schemes. Experimental validation shows that the proposed NoC error recovery scheme utilising both the concepts delivers better or at least similar performance when compared to existing NoC error recovery schemes.\",\"PeriodicalId\":114139,\"journal\":{\"name\":\"IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DDECS.2019.8724641\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2019.8724641","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Efficient Error Recovery Scheme in Fault-tolerant NoC Architectures
This paper presents a novel online fault tolerance method for network-on-chip (NoC) interconnects targeting both permanent and transient faults. We introduce a concept of retransmission credit as a method of distinguishing between permanent and transient faults. Another concept of monitoring errors separately on two types of interconnects – inter-switch links and intra-switch input/output port paths – is also employed. The concept introduced allows more efficient routing in comparison to existing error recovery schemes. Experimental validation shows that the proposed NoC error recovery scheme utilising both the concepts delivers better or at least similar performance when compared to existing NoC error recovery schemes.