多晶硅发射极晶体管发射极电阻的测量与建模

G. Wolstenholme, P. Ashburn, N. Jorgensen, D. Gold, G. Booker
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引用次数: 19

摘要

描述了一种测量多晶硅发射极晶体管的发射极电阻的方法,该方法分离了发射极电阻的界面和金属/多晶硅接触分量。结果表明,对于具有连续界面层的器件,界面电阻控制着发射极电阻,在200 ~ 450 ω μ m/sup 2/之间。该电阻与电流有关,理论与实验结果吻合较好。对于具有不连续界面层的器件,结果表明,通过故意破坏界面层可以获得适合VLSI应用的低界面电阻(17-33 ω μ m/sup 2/)。在这种情况下,金属接触电阻对发射极总电阻的贡献很大。
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Measurement and modelling of the emitter resistance of polysilicon emitter transistors
A method for measuring the emitter resistance of polysilicon emitter transistors is described that separates the interface and metal/polysilicon contact components of the emitter resistance. Results show that for devices with a continuous interfacial layer the interface resistance controls the emitter resistance and is between 200 and 450 Omega mu m/sup 2/. This resistance is found to be current dependent and good agreement between theory and experiment is obtained. Results for devices with a discontinuous interfacial layer indicate that low interface resistances (17-33 Omega mu m/sup 2/) suitable for VLSI applications can be obtained by deliberately breaking up the interfacial layer. In this case the metal contact resistance contributes significantly to the total emitter resistance.<>
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The best-case power-delay products for polysilicon-contacted bipolar-transistor gates. A theoretical study The effect of emitter sidewall isolation on the emitter junction in a double layer polysilicon bipolar process Delay analysis for BiCMOS drivers Comparing techniques for fabrication polysilicon contacted emitter bipolar transistors Thin base formation by double diffused polysilicon technology
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