{"title":"基于外部存储芯片的FPGA设计仿真加速方法研究","authors":"Hongwei Wang, Liu Tang, You Li","doi":"10.1109/PHM58589.2023.00033","DOIUrl":null,"url":null,"abstract":"Aiming at the simulation acceleration requirements of a kind of FPGA design with external memory chips, this paper studies on the FPGA software and hardware combined simulation acceleration platform, puts forward a general memory chip interface conversion idea, takes SRAM as a specific example to illustrate the conversion method, and verifies the correctness of the method through the physical simulation of the software and hardware combined simulation acceleration platform, The applicability of this method is given by influence domain analysis. This method has strong adaptability, so that more FPGA design under test (DUT) can run on the simulation acceleration platform, to improve the efficiency of simulation verification.","PeriodicalId":196601,"journal":{"name":"2023 Prognostics and Health Management Conference (PHM)","volume":"106 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Research on simulation acceleration method of FPGA design with external memory chip\",\"authors\":\"Hongwei Wang, Liu Tang, You Li\",\"doi\":\"10.1109/PHM58589.2023.00033\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Aiming at the simulation acceleration requirements of a kind of FPGA design with external memory chips, this paper studies on the FPGA software and hardware combined simulation acceleration platform, puts forward a general memory chip interface conversion idea, takes SRAM as a specific example to illustrate the conversion method, and verifies the correctness of the method through the physical simulation of the software and hardware combined simulation acceleration platform, The applicability of this method is given by influence domain analysis. This method has strong adaptability, so that more FPGA design under test (DUT) can run on the simulation acceleration platform, to improve the efficiency of simulation verification.\",\"PeriodicalId\":196601,\"journal\":{\"name\":\"2023 Prognostics and Health Management Conference (PHM)\",\"volume\":\"106 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 Prognostics and Health Management Conference (PHM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PHM58589.2023.00033\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 Prognostics and Health Management Conference (PHM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PHM58589.2023.00033","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Research on simulation acceleration method of FPGA design with external memory chip
Aiming at the simulation acceleration requirements of a kind of FPGA design with external memory chips, this paper studies on the FPGA software and hardware combined simulation acceleration platform, puts forward a general memory chip interface conversion idea, takes SRAM as a specific example to illustrate the conversion method, and verifies the correctness of the method through the physical simulation of the software and hardware combined simulation acceleration platform, The applicability of this method is given by influence domain analysis. This method has strong adaptability, so that more FPGA design under test (DUT) can run on the simulation acceleration platform, to improve the efficiency of simulation verification.