{"title":"基于4阶增益增强n径LNA的32dBm OOB-IIP3 bw扩展5G-NR接收机","authors":"Zhixiang Liu, Shiyou Wei, Gengzhen Qi, Pui-in Mak","doi":"10.1109/APCCAS55924.2022.10090370","DOIUrl":null,"url":null,"abstract":"This paper reports a self-interference-resilient receiver (RX) for 5G-NR-FDD covering 0.5 to 2GHz. It incorporates a $4^{\\text{th}}$-order gain-boosted N-path low-noise amplifier (LNA) and a $2^{\\text{nd}}$-order baseband (BB) TIA to widen the −3dB RF-BW and also enhance the out-of-band (OOB) roll-off slope. Furthermore, a positive-feedback loop is created for the input-impedance matching purpose thanks to the impedance-translation property of the N-path network. Implemented in 65nm CMOS process, the simulation results show that with >54MHz RF-BW the RX achieves >24dB OOB rejection at 80MHz offset. When the offset frequency $(\\Delta f)$ is twice the −3dB RF-BW, the RX achieves 32dBm OOB-IIP3, while consuming a reasonable power of 27 to 67mW. The noise figure (NF) ranges from 3.2 to 5.5dB and active area is $0.38\\text{mm}^{2}$.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 32dBm OOB-IIP3 BW-Extended 5G-NR Receiver with 4th-Order Gain-Boosted N-Path LNA\",\"authors\":\"Zhixiang Liu, Shiyou Wei, Gengzhen Qi, Pui-in Mak\",\"doi\":\"10.1109/APCCAS55924.2022.10090370\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper reports a self-interference-resilient receiver (RX) for 5G-NR-FDD covering 0.5 to 2GHz. It incorporates a $4^{\\\\text{th}}$-order gain-boosted N-path low-noise amplifier (LNA) and a $2^{\\\\text{nd}}$-order baseband (BB) TIA to widen the −3dB RF-BW and also enhance the out-of-band (OOB) roll-off slope. Furthermore, a positive-feedback loop is created for the input-impedance matching purpose thanks to the impedance-translation property of the N-path network. Implemented in 65nm CMOS process, the simulation results show that with >54MHz RF-BW the RX achieves >24dB OOB rejection at 80MHz offset. When the offset frequency $(\\\\Delta f)$ is twice the −3dB RF-BW, the RX achieves 32dBm OOB-IIP3, while consuming a reasonable power of 27 to 67mW. The noise figure (NF) ranges from 3.2 to 5.5dB and active area is $0.38\\\\text{mm}^{2}$.\",\"PeriodicalId\":243739,\"journal\":{\"name\":\"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS55924.2022.10090370\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS55924.2022.10090370","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 32dBm OOB-IIP3 BW-Extended 5G-NR Receiver with 4th-Order Gain-Boosted N-Path LNA
This paper reports a self-interference-resilient receiver (RX) for 5G-NR-FDD covering 0.5 to 2GHz. It incorporates a $4^{\text{th}}$-order gain-boosted N-path low-noise amplifier (LNA) and a $2^{\text{nd}}$-order baseband (BB) TIA to widen the −3dB RF-BW and also enhance the out-of-band (OOB) roll-off slope. Furthermore, a positive-feedback loop is created for the input-impedance matching purpose thanks to the impedance-translation property of the N-path network. Implemented in 65nm CMOS process, the simulation results show that with >54MHz RF-BW the RX achieves >24dB OOB rejection at 80MHz offset. When the offset frequency $(\Delta f)$ is twice the −3dB RF-BW, the RX achieves 32dBm OOB-IIP3, while consuming a reasonable power of 27 to 67mW. The noise figure (NF) ranges from 3.2 to 5.5dB and active area is $0.38\text{mm}^{2}$.