合成神经集成电路

L. Akers, M. Walker, R. Grondin, D. Ferry
{"title":"合成神经集成电路","authors":"L. Akers, M. Walker, R. Grondin, D. Ferry","doi":"10.1109/CICC.1989.56743","DOIUrl":null,"url":null,"abstract":"Integrated circuits are approaching biological complexity in device count. Biological systems are fault tolerant, adaptive, and trainable, and the possibility exists for similar characteristics in ICs. The authors report a limited-interconnect, highly layered synthetic neural network that implements these ideals. These networks are specifically designed to scale to tens of thousands of processing elements on current production size dies. A compact analog cell, a training algorithm, and a limited-interconnect architecture which has demonstrated neuromorphic behavior are described","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A synthetic neural integrated circuit\",\"authors\":\"L. Akers, M. Walker, R. Grondin, D. Ferry\",\"doi\":\"10.1109/CICC.1989.56743\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Integrated circuits are approaching biological complexity in device count. Biological systems are fault tolerant, adaptive, and trainable, and the possibility exists for similar characteristics in ICs. The authors report a limited-interconnect, highly layered synthetic neural network that implements these ideals. These networks are specifically designed to scale to tens of thousands of processing elements on current production size dies. A compact analog cell, a training algorithm, and a limited-interconnect architecture which has demonstrated neuromorphic behavior are described\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56743\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56743","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

集成电路在器件数量上接近生物复杂性。生物系统具有容错性、适应性和可训练性,在集成电路中存在类似特性的可能性。作者报告了一个有限互连,高度分层的合成神经网络,实现了这些理想。这些网络专门设计用于在当前生产尺寸的模具上扩展到数万个加工元件。描述了一种紧凑的模拟细胞、一种训练算法和一种有限互连结构,这种结构已经证明了神经形态行为
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A synthetic neural integrated circuit
Integrated circuits are approaching biological complexity in device count. Biological systems are fault tolerant, adaptive, and trainable, and the possibility exists for similar characteristics in ICs. The authors report a limited-interconnect, highly layered synthetic neural network that implements these ideals. These networks are specifically designed to scale to tens of thousands of processing elements on current production size dies. A compact analog cell, a training algorithm, and a limited-interconnect architecture which has demonstrated neuromorphic behavior are described
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