{"title":"合成神经集成电路","authors":"L. Akers, M. Walker, R. Grondin, D. Ferry","doi":"10.1109/CICC.1989.56743","DOIUrl":null,"url":null,"abstract":"Integrated circuits are approaching biological complexity in device count. Biological systems are fault tolerant, adaptive, and trainable, and the possibility exists for similar characteristics in ICs. The authors report a limited-interconnect, highly layered synthetic neural network that implements these ideals. These networks are specifically designed to scale to tens of thousands of processing elements on current production size dies. A compact analog cell, a training algorithm, and a limited-interconnect architecture which has demonstrated neuromorphic behavior are described","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A synthetic neural integrated circuit\",\"authors\":\"L. Akers, M. Walker, R. Grondin, D. Ferry\",\"doi\":\"10.1109/CICC.1989.56743\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Integrated circuits are approaching biological complexity in device count. Biological systems are fault tolerant, adaptive, and trainable, and the possibility exists for similar characteristics in ICs. The authors report a limited-interconnect, highly layered synthetic neural network that implements these ideals. These networks are specifically designed to scale to tens of thousands of processing elements on current production size dies. A compact analog cell, a training algorithm, and a limited-interconnect architecture which has demonstrated neuromorphic behavior are described\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56743\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56743","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Integrated circuits are approaching biological complexity in device count. Biological systems are fault tolerant, adaptive, and trainable, and the possibility exists for similar characteristics in ICs. The authors report a limited-interconnect, highly layered synthetic neural network that implements these ideals. These networks are specifically designed to scale to tens of thousands of processing elements on current production size dies. A compact analog cell, a training algorithm, and a limited-interconnect architecture which has demonstrated neuromorphic behavior are described