Laura Freyman, D. Fick, D. Blaauw, D. Sylvester, M. Alioto
{"title":"基于28nm CMOS的高约束微系统346μm2无参考传感器接口","authors":"Laura Freyman, D. Fick, D. Blaauw, D. Sylvester, M. Alioto","doi":"10.1109/ASSCC.2013.6690993","DOIUrl":null,"url":null,"abstract":"A 346μm2 reference-free, asynchronous VCO-based sensor interface circuit is demonstrated in 28nm LP CMOS. This design does not require high accuracy current sources, voltage sources, or low jitter timing references. It achieves wide resolution and voltage scalability, and consumes only ~1/100th the area of prior approaches. Resolution can be scaled from 2.8 to 11.7 bits and VDD from 500mV to 1.0V.","PeriodicalId":296544,"journal":{"name":"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"212 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 346μm2 reference-free sensor interface for highly constrained microsystems in 28nm CMOS\",\"authors\":\"Laura Freyman, D. Fick, D. Blaauw, D. Sylvester, M. Alioto\",\"doi\":\"10.1109/ASSCC.2013.6690993\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 346μm2 reference-free, asynchronous VCO-based sensor interface circuit is demonstrated in 28nm LP CMOS. This design does not require high accuracy current sources, voltage sources, or low jitter timing references. It achieves wide resolution and voltage scalability, and consumes only ~1/100th the area of prior approaches. Resolution can be scaled from 2.8 to 11.7 bits and VDD from 500mV to 1.0V.\",\"PeriodicalId\":296544,\"journal\":{\"name\":\"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)\",\"volume\":\"212 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-12-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2013.6690993\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2013.6690993","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 346μm2 reference-free sensor interface for highly constrained microsystems in 28nm CMOS
A 346μm2 reference-free, asynchronous VCO-based sensor interface circuit is demonstrated in 28nm LP CMOS. This design does not require high accuracy current sources, voltage sources, or low jitter timing references. It achieves wide resolution and voltage scalability, and consumes only ~1/100th the area of prior approaches. Resolution can be scaled from 2.8 to 11.7 bits and VDD from 500mV to 1.0V.
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