{"title":"基于自适应测试和输出特性的模拟电路故障诊断","authors":"Y. Miura, J. Kato","doi":"10.1109/DFT.2006.30","DOIUrl":null,"url":null,"abstract":"A method for diagnosing analog circuits that is realized by combining the operation-region model and the X-Y zoning method have been proposed. In the method, the authors cloud implement a diagnosis procedure based on a diagnostic method for digital circuits. In this paper, the method by using an adaptive test to obtain a shorter diagnostic sequence length was improved and its characteristics were shown. Moreover, a new data processing method that utilizes the output response of a circuit to obtain better diagnostic performance was proposed. The effectiveness of the proposed methods by applying them to ITC'97 benchmark circuits was demonstrated with hard faults and soft faults. These improved methods can reduce a diagnostic sequence length without degrading the performance of diagnostic resolution and CPU time","PeriodicalId":113870,"journal":{"name":"2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","volume":"410 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Fault Diagnosis of Analog Circuits Based on Adaptive Test and Output Characteristics\",\"authors\":\"Y. Miura, J. Kato\",\"doi\":\"10.1109/DFT.2006.30\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A method for diagnosing analog circuits that is realized by combining the operation-region model and the X-Y zoning method have been proposed. In the method, the authors cloud implement a diagnosis procedure based on a diagnostic method for digital circuits. In this paper, the method by using an adaptive test to obtain a shorter diagnostic sequence length was improved and its characteristics were shown. Moreover, a new data processing method that utilizes the output response of a circuit to obtain better diagnostic performance was proposed. The effectiveness of the proposed methods by applying them to ITC'97 benchmark circuits was demonstrated with hard faults and soft faults. These improved methods can reduce a diagnostic sequence length without degrading the performance of diagnostic resolution and CPU time\",\"PeriodicalId\":113870,\"journal\":{\"name\":\"2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems\",\"volume\":\"410 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFT.2006.30\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT.2006.30","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fault Diagnosis of Analog Circuits Based on Adaptive Test and Output Characteristics
A method for diagnosing analog circuits that is realized by combining the operation-region model and the X-Y zoning method have been proposed. In the method, the authors cloud implement a diagnosis procedure based on a diagnostic method for digital circuits. In this paper, the method by using an adaptive test to obtain a shorter diagnostic sequence length was improved and its characteristics were shown. Moreover, a new data processing method that utilizes the output response of a circuit to obtain better diagnostic performance was proposed. The effectiveness of the proposed methods by applying them to ITC'97 benchmark circuits was demonstrated with hard faults and soft faults. These improved methods can reduce a diagnostic sequence length without degrading the performance of diagnostic resolution and CPU time
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